Issue link: https://resources.pcb.cadence.com/i/1180526
PSpice A/D User Guide Setting up analyses and starting simulation October 2019 450 Product Version 17.4-2019 © 2022 All Rights Reserved. the block in the top-level schematic to a resistor in the subcircuit, do the following: 1. Make the subcircuit your active schematic page in Design Entry HDL. 2. From the Text menu, choose Attributes. 3. Click on the resistor to display the Attributes dialog box. 4. In the Value text box against the VALUE property, type {RFEEDBACK}. The parameter value 10 specified on the block in the top-level schematic will be passed to the resistor. The VALUE property is referenced in the PSPICETEMPLATE property of the resistor as below: R^@REFDES %1 %2 ?TOLERANCE|R^@REFDES| @VALUE ?TOLERANCE|\n.model R^@REFDES RES R=1 DEV=@TOLERANCE%| The PSpice subcircuit mechanism supports parameterizing: ■ constants specified on device statements ■ model parameters ■ expressions consisting of constants ■ parameters ■ functions Creating the netlist You can generate a simulation netlist in one of two ways: ■ In capture, from Capture's Project Manager by using the Create Netlist command under the Tools menu. (If this is the first time you're creating a hierarchical netlist for this project, you can only use this method.) - or - ■ In both Capture and Design Entry HDL, directly from within the design entry tool itself by using the Create Netlist command under the PSpice menu. See Running PSpice Netlister in Design Entry HDL on page 445 for information about running PSpice netlister from Design Entry HDL.