Issue link: https://resources.pcb.cadence.com/i/1180526
PSpice User Guide Analog behavioral modeling October 2019 372 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. of phase change, whichever is least. PSpice then checks to see if it can be loosened without inducing sampling errors. Trading off computer resources for accuracy There is a significant trade-off between accuracy and computation time for parts modeled in the frequency domain. The amount of computer time and memory scale approximately inversely to RELTOL. Therefore, if you can use RELTOL=.01 instead of the default .001, you will be ahead. However, this will not adversely affect the impulse response. You may also wish to vary TMAX and TSTOP, since these also come into play. Since the trade-off issues are fairly complex, it is advisable to first simulate a small test circuit containing only the frequency-domain device, and then after proper validation, proceed to incorporate it in your larger design. The PSpice defaults will be appropriate most of the time if accuracy is your main concern, but it is still worth checking. Note: Do not set RELTOL to a value above 0.05. This can seriously compromise the accuracy of your simulation.