Issue link: https://resources.pcb.cadence.com/i/1180526
PSpice User Guide Analog behavioral modeling October 2019 340 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. components before time zero. The FTABLE part in Figure 6-5 could be used. This part is characterized by the following properties: ROW1 = 0Hz 0 0 ROW2 = 5kHz 0 -5760 ROW3 = 6kHz -60 -6912 DELAY = R_I = MAGUNITS = PHASEUNITS = Since R_I, MAGUNITS, and PHASEUNITS are undefined, each table entry is interpreted as containing frequency, magnitude value in dB, and phase values in degrees. Delay defaults to 0. This produces a PSpice netlist declaration like this: ELOFILT 5 0 FREQ {V(10)} +0Hz 0 0 +5kHz 0 -5760 +6kHz -60 -6912 Since constant group delay is calculated from the values for a given table entry as: group delay = phase / 360 / frequency An equivalent FTABLE instance could be defined using the DELAY property. For this example, the group delay is 3.2 msec (6912 / 360 / 6k = 5760 / 360 / 6k = 3.2m). Equivalent property assignments are: ROW1 = 0Hz 0 0 ROW2 = 5kHz 0 0 ROW3 = 6kHz -60 0 DELAY = 3.2ms R_I = MAGUNITS = PHASEUNITS = Figure 6-5 FTABLE part