Issue link: https://resources.pcb.cadence.com/i/1180526
PSpice User Guide Convergence and "time step too small errors" October 2019 848 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. ■ Look for waveforms that transition vertically (up or down) at the point during which the analysis halts. These are the key nodes, which should be examined for problems. ■ Increase the rise/fall times of the PULSE sources; e.g. from 1f to 1u. Example: VCC 1 0 PULSE 0 1 0 1f 1f becomes VCC 1 0 PULSE 0 1 0 1U 1U An effort should be made to smooth strong non-linearities. The pulse times should be realistic, not ideal. If no rise or fall time values are given, or if 0 is specified, the rise and fall times will be set to the TSTEP value in the .TRAN statement (set in the Output File Options of the Time Domain (Transient) analysis settings in the simulation profile. ■ Ensure that there is no unreasonably large capacitor or inductor If the transient analysis fails at the first time point then usually there is an unreasonably large capacitor or inductor. Usually this is due to a typographical error. Consider the following capacitor: C 1 3, 0 1Ouf "1O" (has the letter O) should have been "10." This capacitor has a value of one farad, not 10 microfarads. An easy way to catch these is to use the LIST option (on the .OPTIONS command). LIST The LIST option can echo back all the devices into the output file that have their values in scientific notation. That makes it easy to spot any unusual values. This kind of problem does not show up during the bias point calculation because capacitors and inductors do not participate in the bias point. Similar comments apply to the parasitic capacitance parameters in transistor (and diode) models. These are normally echoed to the output file (the NOMOD option suppresses the echo but the default is to echo). As in the LIST output, the model parameters are echoed in scientific notation making it easy to spot unusual values. A further