Issue link: https://resources.pcb.cadence.com/i/1180526
PSpice User Guide Creating and editing models October 2019 271 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. Voltage Regulator Test Node Mapping VDG Maximum drain-gate voltage (Maximum difference between NODE_VD and NODE_VG) VDS Maximum drain-source voltage (Maximum difference between NODE_VD and NODE_VS) VGSF Maximum forward gate-source voltage VGSR Maximum reverse gate-source voltage