Issue link: https://resources.pcb.cadence.com/i/1180526
PSpice User Guide Convergence and "time step too small errors" October 2019 846 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. Modelling Checks This is same as in DC analysis. Modelling circuit components on page 842. PSpice Options ■ Set ITL2=100 in the .OPTIONS statement. Example: .OPTIONS ITL2=100 This increases the number of DC iterations that PSpice will attempt before it gives up. ■ Increase or decrease the step values, which are used in the .DC sweep. Example: .DC VCC 0 1 .1 becomes .DC VCC 0 1 .01 Discontinuities in the PSpice models can cause convergence problems. The use of larger steps may help to bypass the discontinuities, while the use of smaller steps may help PSpice find the intermediate answers, which will be used to find the point, which doesn't converge. In some cases, smaller steps can improve convergence, because they help PSpice find a "path" from the valid DC solution at one point to the valid solution at the next. ■ Do not use the DC sweep analysis. Example: .DC VCC 0 5 .1 VCC 1 0 becomes .TRAN .01 1 VCC 1 0 PULSE 0 5 0 1 In many cases, it is preferable to use the transient analysis to ramp the appropriate voltage and/or current sources. The transient analysis tends to be more robust, and is sometimes faster.