Issue link: https://resources.pcb.cadence.com/i/1180526
PSpice User Guide Digital worst-case timing analysis October 2019 667 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. Glitch suppression due to inertial delay Signal propagation through digital primitives is performed by the simulator subject to constraints such as the primitive's function, delay parameter values, and the frequency of the applied stimulus. These constraints are applied both in the context of a normal, well-behaved stimulus, and a stimulus that represents timing hazards. Timing hazards may not necessarily result in the prediction of an X or glitch output from a primitive; these are due to the delay characteristics of the primitive, which PSpice A/D models using the concept of inertial delay. A device presented with a combination of rising and falling input transitions (assuming no other dominant inputs) produces a glitch due to the uncertainty of the arrival times of the transitions (see Figure 16-13). Figure 16-13 Glitch suppression example one. However, when the duration of the conflicting input stimulus is less than the inertial delay of the device, the X result is automatically suppressed by the simulator because it would be overly pessimistic (see Figure 16-14). Figure 16-14 Glitch suppression example two.