PSpice User Guide

PSpice User Guide

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PSpice User Guide Digital worst-case timing analysis October 2019 663 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. Cumulative ambiguity hazard In worst-case mode, simple signal propagation through the network will result in a buildup of ambiguity along the paths between synchronization points. See Glitch suppression due to inertial delay on page 667. The cumulative ambiguity is illustrated in Figure 16-8. Figure 16-8 Cumulative ambiguity hazard example one. The rising and falling transitions applied to the input of the buffer have a 1nsec ambiguity. The delay specifications of the buffer indicate that an additional 2nsec of ambiguity is added to each edge as they propagate through the device. Notice that the duration of the stable state 1 has diminished due to the accumulation of ambiguity. Figure 16-9 shows the effects of additional cumulative ambiguity. Figure 16-9 Cumulative ambiguity hazard example two. The X result is predicted here because the ambiguity of the rising edge propagating through the device has increased to the point where it will overlap the later falling edge ambiguity. Specifically, the rising edge should occur between 3nsec and 12nsec; but, the subsequent falling edge applied to the input predicts that the output starts to fall at 10nsec. This situation is called a cumulative ambiguity hazard. Another cause of cumulative ambiguity hazard involves circuits with asynchronous feedback. The simulation of such circuits under worst-case timing constraints yields an overly pessimistic result due 1 2 8 9 TPxxMN=1 2 5 9 12 TPxxMX=3 TPxxMN=1 2 5 9 12 3 10 12 19 TPxxMX=7

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