Issue link: https://resources.pcb.cadence.com/i/1180526
PSpice A/D User Guide Convergence and "time step too small errors" October 2019 861 Product Version 17.4-2019 © 2022 All Rights Reserved. diagnostic is to ask for the detailed operating bias point (.TRAN/OP) information. .TRAN/OP This lists the small-signal parameters for each semiconductor device including the calculated parasitic capacitances. Realistically Model Circuit; add parasitics, especially stray/junction capacitance The idea here is to smooth any strong non-linearties or discontinuities. This may be accomplished via the addition of capacitance to various nodes and verifying that all semiconductor junctions have capacitance. Other tips include: ■ Bipolar transistors substrate junction The UC Berkeley SPICE contains an unfortunate convention for the substrate node of bipolar transistors. The collector-substrate p-n junction has no DC component. If the capacitance model parameters are specified (e.g., CJS) then the junction has (voltage-dependent) capacitance but no DC current. This can lead to a sneaky problem: if the junction is inadvertently forward-biased it can create a very large capacitance. The capacitance goes as a power of the junction voltage. Normal junctions cannot sustain much forward voltage because a large current flows. The collector-substrate junction is an exception because it has no DC current. If this happens it usually shows up at the first time step. It can be spotted turning on the detailed operating point information (.TRAN/OP) and looking at the calculated value of CJS for bipolar transistors. The whole problem can be prevented by using the PSpice model parameter ISS. This parameter "turns on" the DC current for the substrate junction. ■ Parasitic capacitances It is important that switching times be nonzero. This is assured if devices have parasitic capacitances. The semiconductor model libraries in PSpice A/D have such capacitances. If switches and/or controlled sources are used, then care should be taken to assure that no sections of circuitry can try to switch in zero time. In practice this means that if any positive feedback loops exist