PSpice User Guide

PSpice A/D User Guide October 2019 886 Product Version 17.4-2019 © 2022 All Rights Reserved. G GaAsFETs, see parts glitch suppression 647, 679 global parameters 162 to ?? goal functions, see measurements graph, see plot, Probe window, traces, waveform analysis ground see also parts 143 missing 188 missing DC path to 189 group delay (output variable AC suffix) 773 H help online 24 hierarchical netlist creating 451 customizing 453 no cross-probing from a subcircuit 448 overview 445 SUBPARAM part 448 VHDL_DECS part 449 histograms 594 how to use the user's guide 23 hysteresis curves 563 I I/O model 389, 391, 401, 653 and switching times (TSW) 402 DIGPOWER 402 DRVH 402 DRVL 402 DRVZ 402 INLD 401 INR 402 OUTLD 401 parameter summary 403 TPWRT 399, 402 TSTOREMN 402 IC (property) 846 icon in Simulation Manager 473 to ?? push pin 690 imaginary part (output variable AC suffix) 773 importing traces 732 include files (.INC) configuring 51, 248 with model definitions 250 inductor coupling, see parts inductors see also parts inertial delay 399 initial conditions 842, 846 INLD (I/O model) 401 input noise, total 518 INR (I/O model) 402 instance models and the Model Editor 220 changing model references 244 editing 222 reusing 245 saving for global use 221 interface subcircuits 408, 652, 665 and I/O models 391, 653 and power supplies 652 CAPACITANCE 408 customized 408 DRVH 408 DRVL 408 IO_LEVEL 390 N device (digital input) 408 O device (digital output) 408 syntax 408 IO_LEVEL interface subcircuit parameter 390 part property 326 stimulus property (digital) 629 IO_MODEL stimulus property (digital) 629 J JFETs, see parts K keyboard shortcuts, see online PSpice Help L Laplace transforms and non-causality 378 large data files 724 displaying fewer data points 725

• Cover
• Contents
• Before you begin
• Welcome
• Comparison of PSpice A/D Tiers
• How to use this guide
• Symbols and conventions
• Related documentation
• PSpice A/D Samples and Tutorials
• Part one: Simulation primer
• Things you need to know
• Chapter overview
• What is PSpice A/D?
• Analyses you can run with PSpice A/D
• Basic analyses
• Advanced multi-run analyses
• Analyzing waveforms with PSpice A/D
• What is waveform analysis?
• Using PSpice A/D with other programs
• Using design entry tools to prepare for simulation
• What is the PSpice Stimulus Editor?
• What is the PSpice Model Editor?
• Files needed for simulation
• Files that design entry tool generates
• Other files that you can configure for simulation
• Files that PSpice A/D generates
• Directory structure for analog projects in Capture
• How are files configured at the design level maintained in the directory structure for analog projects?
• How are files configured at the profile level maintained in the new directory structure for analog projects?
• What happens when I convert an analog project that uses a design from another project or from another location?
• What should I do if the schematic for a converted analog project uses FILESTIMn parts from the SOURCE library?
• Design Entry HDL libraries
• Reference Libraries
• Local libraries
• PSpice model libraries
• The cds.lib file
• Encrypting PSpice Models
• Using PSpiceEnc
• Using Model Editor
• Simulation examples
• Chapter overview
• Example circuit creation
• Using Capture
• Using Design Entry HDL
• Using Design Templates
• Finding out more about setting up your design
• Running PSpice A/D
• Performing a bias point analysis
• Using the simulation output file
• Finding out more about bias point calculations
• DC sweep analysis
• Setting up and running a DC sweep analysis
• Displaying DC analysis results
• Finding out more about DC sweep analysis
• Transient analysis
• Finding out more about transient analysis
• AC sweep analysis
• Setting up and running an AC sweep analysis
• AC sweep analysis results
• Finding out more about AC sweep and noise analysis
• Parametric analysis
• Setting up and running the parametric analysis
• Analyzing waveform families
• Finding out more about parametric analysis
• Performance analysis
• Finding out more about performance analysis
• Part two: Design entry
• Preparing a design for simulation
• Chapter overview
• Checklist for simulation setup
• Typical simulation setup steps
• Advanced design entry and simulation setup steps
• When netlisting fails or the simulation does not start
• Using parts that you can simulate
• Vendor-supplied parts
• Passive parts
• Breakout parts
• Behavioral parts
• Simulating asymmetric parts in PSpice A/D
• Simulating homogeneous parts in PSpice A/D
• Specifying values for part properties
• Using Global Parameters and Expressions for Values
• Global parameters
• Expressions
• Defining power supplies
• For the analog portion of your circuit
• For A/D interfaces in mixed-signal circuits
• Defining stimuli
• Analog stimuli
• Digital stimuli
• Things to watch for
• Unmodeled parts
• Unconfigured model, stimulus, or include files
• Unmodeled pins
• Missing ground
• Missing DC path to ground
• Creating and editing models
• Chapter overview
• What are models?
• How are models organized?
• Model libraries
• Model library configuration
• Global vs. design vs. profile models and libraries
• Nested model libraries
• PSpice-provided models
• Model library data
• Device characteristic curves-based models vs. Template-based models
• Tools to create and edit models
• Ways to create and edit models
• Using the Model Editor
• Ways to use the Model Editor
• Running the Model Editor alone
• Starting the Model Editor
• Creating models using the Model Editor
• Creating models based on device characteristic curves
• Creating models based on PSpice templates
• Importing an existing model
• Enabling and disabling automatic part creation
• Running the Model Editor from the schematic editor
• Model creation examples
• Example: Creating a PSpice model based on device characteristic curves
• Example: Creating template-based PSpice model
• Editing model text
• Example: editing a Q2N2222 instance model
• Using the Create Subcircuit Format Netlist command (Capture only)
• Changing the model reference to an existing model definition
• Reusing instance models
• Reusing instance models in the same schematic
• Making instance models available to all designs
• Configuring model libraries
• The Configuration Files tab
• How PSpice A/D uses model libraries
• Adding model libraries to the configuration
• Changing the model library scope from profile to design, profile to global, design to global and vice versa
• Changing model library search order
• Order of Access and Precedence for Models used in Simulation
• Changing the library search path
• Handling smoke information using the Model Editor
• Adding smoke information to PSpice models
• Creating template-based PSpice models with smoke information
• Using the Model Editor to edit smoke information
• Examples: Smoke
• Adding smoke information to the D1 diode model
• Adding smoke information to the OPA_LOCAL operational amplifier model
• Smoke parameters
• Diode
• Bipolar Junction Transistors
• Magnetic Core
• Ins Gate Bipolar Transistor (IGBT)
• Junction FET
• Operational Amplifier
• MOSFET
• Voltage Regulator
• Darlington Transistor
• Creating parts for models
• Chapter overview
• What's different about parts used for simulation?
• Ways to create parts for models
• Preparing your models for part creation
• Starting the Model Editor
• Using the Model Editor to create parts
• Batch mode of part creation
• Interactive mode of part creation
• Creating Design Entry Tool parts for all models in a library
• Using batch mode
• Using interactive mode
• Setting up automatic part creation
• Example
• Creating parts in the batch mode
• Creating parts using interactive mode
• Basing new parts on a custom set of parts
• Editing part graphics (Capture only)
• How Capture places parts
• Defining grid spacing
• Attaching models to parts
• MODEL
• Defining part properties needed for simulation
• PSPICETEMPLATE
• IO_LEVEL
• MNTYMXDLY
• PSPICEDEFAULTNET
• Analog behavioral modeling
• Chapter overview
• Overview of analog behavioral modeling
• The ABM part library file
• Placing and specifying ABM parts
• Net names and device names in ABM expressions
• Forcing the use of a global definition
• ABM part templates
• Control system parts
• Basic components
• Limiters
• Chebyshev filters
• Integrator and differentiator
• Table look-up parts
• Laplace transform part
• Math functions
• ABM expression parts
• An instantaneous device example: modeling a triode
• PSpice-equivalent parts
• Implementation of PSpice-equivalent parts
• Modeling mathematical or instantaneous relationships
• Lookup tables (ETABLE and GTABLE)
• Frequency-domain device models
• Laplace transforms (LAPLACE)
• Frequency response tables (EFREQ and GFREQ)
• Cautions and recommendations for simulation and analysis
• Instantaneous device modeling
• Frequency-domain parts
• Laplace transforms
• Trading off computer resources for accuracy
• Basic controlled sources
• Creating custom ABM parts
• Digital device modeling
• Chapter overview
• Introduction
• Functional behavior
• Timing characteristics
• Timing model
• Propagation delay calculation
• Inertial and transport delay
• Input/Output characteristics
• Input/Output model
• Defining Output Strengths
• Charge storage nets
• Creating your own interface subcircuits for additional technologies
• Creating a digital model using the PINDLY and LOGICEXP primitives
• Digital primitives
• Logic expression (LOGICEXP primitive)
• Pin-to-pin delay (PINDLY primitive)
• BOOLEAN
• PINDLY
• Constraint checker (CONSTRAINT primitive)
• Setup_Hold
• Width
• Freq
• 74160 example
• Part three: Setting up and running analyses
• Setting up analyses and starting simulation
• Chapter overview
• Analysis types
• Setting up analyses
• Order for standard analyses
• Output variables
• Setting AutoConvergence
• Using Advanced Analog Options
• Performance package
• Starting a simulation
• Creating a simulation netlist
• Starting a simulation from a Design Entry Tool
• Starting a simulation outside of Design Entry Tool
• Setting up batch simulations
• The PSpice A/D simulation window
• Interacting with a simulation
• Extending a transient analysis
• Interrupting a simulation
• Scheduling changes to runtime parameters
• Setting Autoconvergence from the Runtime Settings Dialog Box
• Using the Simulation Manager
• Overview of the Simulation Manager
• Setting up multiple simulations
• Starting, stopping, and pausing simulations
• Attaching PSpice A/D to a Simulation
• Setting options in the Simulation Manager
• DC analyses
• Chapter overview
• DC Sweep
• Minimum requirements to run a DC sweep analysis
• Overview of DC sweep
• Setting up a DC stimulus
• Nested DC sweeps
• Curve families for DC sweeps
• Bias point
• Minimum requirements to run a bias point analysis
• Overview of bias point
• Small-signal DC transfer
• Minimum requirements to run a small-signal DC transfer analysis
• Overview of small-signal DC transfer
• DC sensitivity
• Minimum requirements to run a DC sensitivity analysis
• Overview of DC sensitivity
• AC analyses
• Chapter overview
• AC sweep analysis
• Setting up and running an AC sweep
• What is AC sweep?
• Setting up an AC stimulus
• Setting up an AC analysis
• AC sweep setup in example.opj
• How PSpice A/D treats nonlinear devices
• Noise analysis
• Setting up and running a noise analysis
• What is noise analysis?
• Setting up a noise analysis
• Analyzing Noise in the Probe window
• Parametric and temperature analysis
• Chapter overview
• Parametric analysis
• Minimum requirements to run a parametric analysis
• Overview of parametric analysis
• RLC filter example
• Example: frequency response vs. arbitrary parameter
• Temperature analysis
• Minimum requirements to run a temperature analysis
• Overview of temperature analysis
• Transient analysis
• Chapter overview
• Overview of transient analysis
• Minimum requirements to run a transient analysis
• Defining a time-based stimulus
• Overview of stimulus generation
• Using CheckPoints
• Specifying CheckPoints
• Restarting Simulation from a Saved CheckPoint
• The Stimulus Editor utility
• Stimulus files
• Configuring stimulus files
• Starting the Stimulus Editor
• Defining stimuli
• Creating new stimulus symbols
• Editing a stimulus
• Deleting and removing traces
• Manual stimulus configuration
• Finding out more about the Stimulus Editor
• Transient (time) response
• Internal time steps in transient analyses
• Switching circuits in transient analyses
• Plotting hysteresis curves
• Fourier components
• Monte Carlo and sensitivity (worst-case) analyses
• Chapter overview
• Statistical analyses
• Overview of statistical analyses
• Output control for statistical analyses
• Model parameter values reports
• Monte Carlo history support
• Waveform reports
• Collating functions
• Temperature considerations in statistical analyses
• Monte Carlo analysis
• Example: Monte Carlo analysis of a pressure sensor
• Monte Carlo Histograms
• Worst-case analysis
• Overview of worst-case analysis
• Worst-case analysis example
• Tips and other useful information
• Digital simulation
• Chapter overview
• What is digital simulation?
• Steps for simulating digital circuits
• Concepts you need to understand
• States
• Strengths
• Defining a digital stimulus
• Using the DIGSTIMn part
• Defining input signals using the Stimulus Editor
• Using the DIGCLOCK part
• Using STIM1, STIM4, STIM8 and STIM16 parts
• Using the FILESTIMn parts
• Defining simulation time
• Adjusting simulation parameters
• Selecting propagation delays
• Initializing flip-flops
• Starting the simulation
• Analyzing results
• Adding digital signals to a plot
• Adding buses to a waveform plot
• Tracking timing violations and hazards
• Mixed analog/digital simulation
• Chapter overview
• Interconnecting analog and digital parts
• Interface subcircuit selection by PSpice A/D
• Level 1 interface
• Level 2 interface
• Setting the default A/D interface
• Specifying digital power supplies
• Default power supply selection by PSpice A/D
• Creating custom digital power supplies
• Interface generation and node names
• Digital worst-case timing analysis
• Digital worst-case timing
• Digital worst-case analysis compared to analog worst-case analysis
• Starting digital worst-case timing analysis
• Simulator representation of timing ambiguity
• Propagation of timing ambiguity
• Identification of timing hazards
• Convergence hazard
• Critical hazard
• Cumulative ambiguity hazard
• Reconvergence hazard
• Glitch suppression due to inertial delay
• Methodology
• Part four: Viewing results
• Analyzing waveforms
• Chapter overview
• Overview of waveform analysis
• Elements of a plot
• Elements of a Probe window
• Managing multiple Probe windows
• Setting up waveform analysis
• Setting up colors
• Viewing waveforms
• Setting up waveform display from design entry tools
• Viewing waveforms while simulating
• Using schematic page markers to add traces
• Using display control
• Using plot window templates
• Limiting waveform data file size
• Viewing large data files
• Using simulation data from multiple files
• Comparing measured data with simulated data
• Saving simulation results in ASCII format
• Analog example
• Mixed analog/digital tutorial
• About digital states
• About the oscillator circuit
• Setting up the design
• Running the simulation
• Analyzing simulation results
• User interface features for waveform analysis
• Zoom regions
• Scrolling traces
• Showing and hiding traces
• Sizing digital plots
• Modifying trace expressions and labels
• Moving and copying trace names and expressions
• Copying and moving labels
• Tabulating trace data values
• Using cursors
• Tracking digital simulation messages
• Message tracking from the message summary
• Message tracking from the waveform
• Trace expressions
• Basic output variable form
• Output variable form for device terminals
• Analog trace expressions
• Digital trace expressions
• Measurement expressions
• Chapter overview
• Measurements overview
• Measurement strategy
• Procedure for creating measurement expressions
• Setup
• Composing a measurement expression
• Viewing the results of measurement evaluations
• Example
• Viewing the results of measurement evaluations.
• Measurement definitions included in PSpice A/D
• For power users
• Creating custom measurement definitions
• Definition example
• Measurement definition syntax
• Syntax example
• Other Output Options
• Chapter overview
• Viewing analog results in the PSpice A/D window
• Writing additional results to the PSpice output file
• Generating plots of voltage and current values
• Generating tables of voltage and current values
• Generating tables of digital state changes
• Creating test vector files
• Exporting Trace to CSV File
• Bias Point Display
• Introduction
• How bias information is stored and updated
• Bias point data for multiple analyses
• Displaying bias point values
• Controlling the display of bias points
• Moving bias points
• Updating bias point values
• Menu commands for bias point display
• Toolbar controls for bias point display
• Toggling a specific current bias display
• Toggling a specific voltage bias display
• Toggling a specific power bias display
• Setting initial state
• Appendix overview
• Save and load bias point
• Save bias point
• Load bias point
• Setpoints
• Setting initial conditions
• Convergence and "time step too small errors"
• Appendix overview
• Introduction
• Newton-Raphson requirements
• Is there a solution?
• Are the equations continuous?
• Is the initial approximation close enough?
• Diagnostics
• Bias Point (DC) Convergence
• DC Sweep Convergence
• Transient Convergence
• Importing Spice Models
• Appendix Overview
• Introduction
• Importing text models
• Generating Part Symbols
• Creating New Symbols
• Using symbols from an existing symbol library
• Using Model Import wizard
• Configuring new model library
• Editing Model Editor created symbols
• Index