Issue link: https://resources.pcb.cadence.com/i/1180526
PSpice User Guide Mixed analog/digital simulation October 2019 646 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. Table 15-2 Default digital power/ground pin connections The PSPICEDEFAULTNET pin properties have the same default values as the digital power and ground nodes created by the default power supply. These node assignments are passed from the part instance to the digital primitives describing its behavior, connecting any digital primitive affected by an analog connection to the correct power supply. The default I/O models and power supply subcircuits are found in DIG_IO.LIB. The four default power supplies provided in the model library are DIGIFPWR (TTL), CD4000_PWR (CD4000 series CMOS), ECL_10K_PWR (ECL 10K), and ECL_100K_PWR (ECL 100K). Logic family Digital power/ ground pin properties Default digital power/ground nodes TTL PSPICEDEFAULTNET (PWR) PSPICEDEFAULTNET (GND) $G_DPWR (5.0 volts) $G_DGND (0 volts) CD4000 PSPICEDEFAULTNET (VDD) PSPICEDEFAULTNET (VSS) $G_CD4000_VDD (5 volts) $G_CD4000_VSS (0 volts) ECL 10K PSPICEDEFAULTNET (VEE) PSPICEDEFAULTNET (VCC1) PSPICEDEFAULTNET (VCC2) $G_ECL_10K_VEE (-5.2 volts) $G_ECL_10K_VCC1 (0 volts) $G_ECL_10K_VCC2 (0 volts) ECL 100K PSPICEDEFAULTNET (VEE) PSPICEDEFAULTNET (VCC1) PSPICEDEFAULTNET (VCC2) $G_ECL_100K_VEE (-4.5 volts) $G_ECL_100K_VCC1 (0 volts) $G_ECL_100K_VCC2 (0 volts)