Issue link: https://resources.pcb.cadence.com/i/1180526
PSpice User Guide Setting up analyses and starting simulation October 2019 436 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. Starting a simulation After you have used a design entry tool to enter your circuit design and have set up the analyses to be performed, you can start a simulation by choosing Run from the PSpice menu. When you enter and set up your circuit this way, the design entry tool automatically generates the simulation files and starts PSpice. There may be situations, however, when you want to run PSpice outside of any design entry tool. You may want to simulate a circuit that was not created in Capture or Design Entry HDL, for example, or you may want to run simulations of multiple circuits in batch mode. This section includes the following: ■ Creating a simulation netlist on page 436 ■ Starting a simulation from a Design Entry Tool on page 449 ■ Starting a simulation outside of Design Entry Tool on page 449 ■ Setting up batch simulations on page 450 ■ The PSpice simulation window on page 451 Creating a simulation netlist A netlist is the connectivity description of a circuit, showing all of the components, their interconnections, and their values. When you create a simulation netlist from a design entry tool, that netlist describes the current design. You have a choice between two types of netlist formats: ■ a flat netlist ■ a hierarchical netlist Note: You can create only hierarchical netlists for Design Entry HDL. The flat netlist is generated for all levels of hierarchy, starting from the top, regardless of whether you are pushed into any level of the hierarchy. Flat netlists are most commonly used as input to PCB layout tools. The flat simulation netlist format for PSpice 1 contains device entries for all parts on a subcircuit (child) schematic multiple times, once for each instance of the hierarchical part or block used.