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PSpice User Guide Digital device modeling October 2019 387 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. Timing characteristics A digital device model's timing behavior can be defined in one of two ways: ■ Most primitives have an associated Timing model, in which propagation delays and timing constraints (such as setup/hold times) are specified. This method is used when it is easy to partition delays among individual primitives; typically when the number of primitives is small. ■ Use the PINDLY and CONSTRAINT primitives, which can directly model pin-to-pin delays and timing constraints for the whole device model. With this method, all other functional primitives operate in zero delay. Refer to the online PSpice Reference Guide for a detailed discussion on these two primitives. In addition to explicit propagation delays, other factors, such as output loads, can affect the total propagation delay through a device. Timing model With the exception of the PULLUP, PULLDN, and PINDLY devices, all digital primitives have a Timing model which provides timing parameters to the simulator. The Timing model for each primitive type is unique. That is, the model name and the parameters that can be defined for that model vary with the primitive type. Within a Timing model, there may be one or more types of parameters: ■ Propagation delays (TP) ■ Setup times (TSU) ■ Hold times (TH) ■ Pulse widths (TW) ■ Switching times (TSW) Each parameter is further divided into three values: minimum (MN), typical (TY), and maximum (MX). For example, the typical low-to-high propagation delay on a gate is specified as the parameter TPLHTY.