Issue link: https://resources.pcb.cadence.com/i/1180526
PSpice User Guide Preparing a design for simulation October 2019 155 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. Many of the digital parts provided in the PSpice libraries are modeled using these primitives. You can also create your own digital behavioral parts using these primitives. For more information, see: ■ Chapter 7, "Digital device modeling" ■ the Digital Devices chapter in the online PSpice Reference Guide. Simulating asymmetric parts in PSpice You can simulate packaged asymmetric parts in PSpice. Asymmetric parts consist of a set of symbols with one power symbol that is shared by the other symbols. The symbols can be placed across pages and blocks but the symbols must have the same reference designator (LOCATION). The asymmetric symbols cannot have SPLIT_INST or SPLIT_INST_NAME properties. In addition, the shared symbol should not have any PSPICETEMPLATE property. The other symbols should have PSPICETEMPLATE property for all pins. Note: The Current/power marker is not plotted for shared symbol. For example, in the figure the asymmetric part consists of three OpAmp symbols and a power symbol that is shared. In this case, the resulting symbol has five pins, namely A, B, C, and the two power and ground pins D and E. The resultant netlist will read as follows: X_X1 netA1 netB1 netC1 netD netE X_X2 netA2 netB2 netC2 netD netE X_X1 netA3 netB3 netC3 netD netE