Issue link: https://resources.pcb.cadence.com/i/1180526
PSpice A/D User Guide Convergence and "time step too small errors" October 2019 854 Product Version 17.4-2019 © 2022 All Rights Reserved. ❍ Make sure that no (groups of) nodes are isolated from ground by current sources and/or capacitors. ❑ "Voltage source or inductor loop" message: ❍ Make sure that there are no loops of only inductors and/or voltage sources. ■ Place the ground (node 0) somewhere in the circuit. Be careful when you use floating grounds (e.g. chassis ground); you may need to connect a large resistor from the floating node to ground. All nodes will be reported as floating if "0 ground" is not used. ■ Make sure that voltage/current generators use realistic values, and verify that the syntax is correct. ■ Make sure that dependent source gains are correct, and that E/G element expressions are reasonable. Verify that division by zero or LOG(0) cannot occur. ■ Make sure that there are no unrealistic model parameters; especially if you have manually entered the model into the netlist. ■ Avoid using digital components, unless really necessary. Initialize the nodes with valid digital value to ensure the state is not ambiguous. Modelling circuit components ■ Semiconductors The first consideration for semiconductors is to avoid physically unrealistic model parameters. As PSpice A/D steps the power supplies up, it has to step carefully through the turn on transition for each device. In the diode example above, for the setting N=1e-6, the knee of the I-V curve would be too sharp for PSpice A/D to maintain its continuity within the power supply step size limit of 1e-6. ■ Behavioral modeling expressions Range limits: Voltages and currents in PSpice A/D are limited to the range +/- 1e10. Care must be taken that the output of expressions falls within this range. This is especially important when one is building an electrical analog of a mechanical, hydraulic or other type of system.