Migration Guide to Allegro

Migration Guide for Allegro Platform Products Allegro Platform High Speed Products October 2019 124 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. ■ SI_IGNORE_DML_LIBS ■ SI_DML_WORKING_LIB The new SI path variables described here will be searched for in the following order: ■ The project control file (.cpm) ■ The local env file (For example. ~\pcbenv\env) ■ The \share\pcb\text\env file ■ A system environment variable of the same name When a pre-16.3 design is opened with an existing .run directory containing case.cfg settings for dml files, the appropriate 16.3 SI variables (SI_MODEL_PATH and SI_DML_WORKING_LIB) are set in the local env file one time.

• Cover
• Contents
• Read This First
• Upgrading from Earlier Releases to 17.2-2016
• Allegro Platform Front-End Products
• Allegro Design Entry HDL
• Migrating from Releases 16.6-2015 and 17.2-2016 to Release 17.4-2019
• Migrating from Release 16.6 to Release 17.2-2016
• Migrating from Release 16.5 to Release 16.6
• Migrating to Release 16.5
• System Connectivity Manager
• Migrating from Release 17.2-2016 to Release 17.4-2019
• Migrating from Release 16.6 to Release 17.2
• Migrating to Release 16.3
• Design Entry CIS
• Migrating from Release 17.2-2016 to Release 17.4-2019
• Migrating from Release 16.6 to Release 17.4-2019
• Allegro PSpice Simulator
• Migrating from Release 17.2-2016 to Release 17.4-2019
• Migrating from Release 16.6 to Release 17.4-2019
• Core Allegro Platform Back-End Products
• Single IC Packaging Tool
• Migrating from 17.2-2016 to 17.4-2019
• Licensing Changes
• High Resolution Displays
• Database
• Uprev
• Downrev
• Scripts
• Shapes
• Obsolete and Updated Commands
• User Interface Changes and Form Migration
• FLEX Modes and Field Rules
• Migrating from 16.6 to Release 17.4-2019
• Scripts
• Files
• Fields/Characters Names
• Shortcut Keys
• Class and Subclass Changes
• Net Short
• Padstack
• Embedded_Geometry/Soldermask
• Electrical DRC
• Shape Voiding
• Backdrill
• Viewer Plus
• Visibility Pane
• Compatibility with other tools in the Allegro Platform
• SKILL
• Removed Commands
• Removed Features
• Constraint Manager
• Allegro EDM (previously ADW)
• Migrating to Release 17.4-2019
• Updating Allegro EDM Component Database
• Verifying Flow Files
• Updating Project Files
• Customizing Project Workspaces
• Migrating to Release 17.2-2016, HotFix 049
• Stopping and Starting the Allegro EDM service on Linux
• Stopping and Starting the Allegro EDM Service on Windows
• Migrating to Release 17.27
• Stopping the Allegro EDM service on Linux
• Remove Existing Allegro EDM Service on Windows and Reinstall
• Migrating to Release 17.25
• Migrating to Release 17.2-2016
• Updating Allegro EDM Component Database
• Migrating Flow Files
• Updating Project Files
• Customizing Project Workspaces
• Allegro Platform Package Products
• Migrating to 17.2-2016
• Die Stack Editor changes
• Via structures created using earlier releases
• Migrating to Release 16.6
• Logic commands for co-design components
• Mixed-Case Support and Co-Design Option in Verilog from SCM
• Wire Bond Application Mode Replaces the wirebond select Command
• New Assembly Rule Checks
• Cadence 3D Design Viewer Enhancements
• Creating Unique Net Names
• Update Labels
• Support for Sub-Stacks in Die Stacks
• Additional Changes
• Migrating Pre-16.3 Designs With Assembly Rules Checks
• Allegro Platform High Speed Products
• Topology Templates
• DML/IML Path
• Migration-Related Information for Release 16.2
• Net Extraction in HDI Designs
• PakSI-E 3-D Field Solver
• Virtuoso SiP Architect
• Migrating to the 17.2-2016 Release