01 - Exploring the Workbench Canvas With Topology Creation

This module covers exploring the Sigrity X Topology Workbench canvas and creating a new topology from scratch. Do the following steps:

1. Open Sigrity X Topology Workbench in one the following ways:
   • Start > Run and type TopWb
   • Start > Programs > Cadence System Analysis (Product Version) > Sigrity X Topology Workbench (Product Version) 
2. In the Product Choices dialog, select Topology Explorer and click OK.
   
3. The Sigrity X Topology Workbench window opens as shown below:
   

   Click New under Start Something Awesome.

4. The Create New Topology dialog appears as shown below.
   

   This dialog allows access to all capabilities in TopWb. Selecting options in the other tabs will relaunch the Product Choices dialog.

   There are currently four methods of topology creation. The first and second methods are available in the Create New Topology dialog.

   1. From scratch (the “<blank topology>” template row)
   2. From a template (one of the named template rows)
   3. From old formats (.ssix and .top files with the Open or Open Recent links under Get Started)
   4. Extract from Allegro

   In the Create New Topology dialog:

   • Enter a name in the Topology Name field.
   • Verify the directory in the Topology Path field.
   • Select the <blank topology> row.
   • Click on the Create button.
5. The Sigrity X Topology Workbench canvas is designed to have a minimalistic layout with a few symbols and panes on the left and right sides of the canvas. Additional dialogs open at the bottom as needed.
   
6. Select View > Command Window from the main menu.

   Sigrity X Topology Workbench supports the Tcl scripting language. This window can also be accessed with the Command Window symbol in the lower-left side of the main window.

7. Click on X in the upper-right corner of the dialog to close the window.
8. Make sure both Diff Signals and Block-Based are unchecked in the Add Block pane.
9. Build a topology by using the following elements:
   1. Transmitter (IBIS)
   2. Trace
   3. Receiver (IBIS)

   The IBIS blocks have a B mark on them.

   Select one block at a time. After you finish, your topology should look like the following:

   

   With both check boxes disabled in the Add Block pane, the connectivity is single-pin-based, just like SigXplorer, and requires no MCP to define the connectivity.

10. Simulate by picking the Start Transient Analysis button at the top-center of TopWb.

    All blocks have default models associated.

    

    The waveform viewer looks like 2D curves, but it is a different .exe file and has additional capabilities.

11. Close the waveform viewer window.
12. Double-click on the Tx block. It will open Edit Properties window.

    This will display the block properties in the Properties pane. This method simplifies the use model. Notice the default IBIS model and the button to access the subcircuit at the bottom.

13. Click on the last column of the IBIS File row and select Name and Value.

    The symbols in this last column indicate visibility on the canvas and give you control over what gets annotated.

    

14. Right-click on some blank part of the canvas.
15. Select Display Unconnected Power Pins.

    

16. Right-click again and select Display Unconnected Ground Pins.
    Both “display” options should now have a checkmark and you will see the exposed power and ground nodes (as appropriate) on each block.

    

17. Right-click on the ground pin for the Tx block and select Short to GND.

    Visually, this is equivalent to not exposing the pin. Pins can be connected directly to the ground with an automatic symbol added or connected through any desired path.

18. Right-click on the Tx power pin and select Connect to Power Supply.

    A range of values is added to the pin.

19. Double-click on the same Tx power pin just below the voltage values as shown in the screenshot in step 18.

    A selectable box lets you edit the values as shown in the Edit Properties pane. This lets you set the voltage range for a block.

20. Select everything on the canvas by dragging a window and press the Delete key. This deletes the components placed and the associated connectivity.
21. Select the Block-Based check box in the Add Block pane. Any new block added will have MCP-based connectivity.
22. Rebuild exactly the same topology (after reselecting the Add Block symbol):
    1. Transmitter (IBIS)
    2. W Element
    3. Receiver (IBIS)
    

    Notice the thicker connectivity lines and the number of connected / total connections indication at each pin.

23. Double-click on one of the thick purple connectivity lines.

    

    This is the MCP connectivity pane.

24. Click on X to close the Connection Definition pane.
25. Double-click on the pin on the Tx block.

    This opens the pins in the Edit Properties pane.

26. Right-click on the Tx pin and select Remove Selected Pin(s).

    

27. Repeat the process for the pin on the other side of Trace (remove the pin “a”).

    Now, this topology has a mix of single-pin and multi-pins. This is just some of the available customizations to have a mix of hierarchy in the canvas. You might also go the other way.

    [Optional] Delete all connecting lines on the canvas by selecting them and pressing the Delete key. Now, move the element, W, up and out of the way. Connect Tx and Rx by overlapping the pins and move them back into the positions illustrated above. Place W on top of the existing interconnect. As long as the pins match, the new connections will be made. Getting Started with Topology Workbench for Topology Creation and Extraction Using Constraint Manager: RAK

28. Select the single pin on the Tx block and slide it back to the upper pin.
    This will merge the pins as a single multi-pin.
29. Exit Sigrity X Topology Workbench without saving.