02 - Simulation Examples (Part 1)

Example circuit creation

The circuit creation examples are for the design entry tools, OrCAD Capture and Design Entry HDL.

Using Capture

This section describes how to use OrCAD Capture to create the simple diode clipper circuit shown in Figure 2-1.

Figure 2-1 Diode clipper circuit.

To create a new PSpice A/D project

1. From the Windows Start menu, choose the Cadence release and then the Capture shortcut to start Capture.
2. In the Project Manager, choose File – New – Project.
3. Select Analog or Mixed-Signal Circuit Wizard.
4. In the Name text box, enter the name of the project (CLIPPER).
   
   Do not use a period (.) in the name of your projects or designs.
5. Use the Browse button to select the location for the project files, then click OK.
6. In the Create PSpice Project dialog box, select Create a blank project.
7. Click OK.
   No special libraries need to be configured at this time. A new page will be displayed in Capture and the new project will be configured in the Project Manager.

To place the voltage sources

1. In Capture, switch to the schematic page editor.
2. Choose Place – Part to display the Place Part dialog box.
3. Add the library for the parts you need to place:
   1. Click the Add Library button ( ).
   2. Select SOURCE.OLB (from the PSpice library) and click Open.
      
      There are two sets of library files supplied with Capture and PSpice A/D. The standard schematic part libraries are found in the directory \TOOLS\CAPTURE\LIBRARY. The part libraries that are designed for simulation with PSpice A/D are found in the sub-directory \TOOLS\CAPTURE\LIBRARY\PSPICE. In order to have access to specific parts, you must first configure the library in Capture using the Add Library function.
4. In the Part text box, type VDC.
5. Click the Place Part button ( ).
6. Move the pointer to the correct position on the schematic page (see Figure 2-1) and click to place the first part.
7. Move the cursor and click again to place the second part.
8. Right-click and choose End Mode to stop placing parts.

To place the diodes

1. Add the library for the parts you need to place:
   1. Click the Add Library button  .
   2. Select DIODE.OLB (from the PSpice library) and click Open.
2. In the Part text box, type D1N39 to display a list of diodes.
   When placing parts:
   • Leave space to connect the parts with wires.
   • You will change part names and values that do not match those shown in Figure 2-1 later in this section.
3. Select D1N3940 from the Part List and click Place Part ( ).
4. Press R to rotate the diode to the correct orientation.
5. Click to place the first diode (D1), then click to place the second diode (D2).
6. Right-click and choose End Mode to stop placing parts.

To move the text associated with the diodes (or any other object)

1. Click the text to select it, then drag the text to a new location.

To place the other parts

1. Add the library for the parts you need to place:
   1. Click the Add Library button ( ).
   2. Select ANALOG.OLB (from the PSpice library) and click Open.
2. Follow similar steps as described for the diodes to place the parts listed below, according to Figure 2-1. The part names you need to type in the Part name text box of the Place Part dialog box are shown in parentheses:
   • resistors (R)
   • capacitor (C)
3. To place the off-page connector parts (OFFPAGELEFT-R), click the Place Off-Page Connector button  on the tool palette.
4. Add the library for the parts you need to place:
   1. Click the Add Library button.
   2. Select CAPSYM.OLB (from the Capture library) and click Open.
5. Place the off-page connector parts according to Figure 2-1.

To place the zero ground part

1. To place the ground parts (0), click the GND button  on the tool palette.
   

   Figure 2-2 Tool Palette

2. Add the library for the parts you need to place:
   1. Click the Add Library button.
   2. Select SOURCE.OLB (from the PSpice library) and click Open.
3. Place the 0 ground part from SOURCE.OLB as shown in figure 2-2.
   
   You must use the 0 (zero) ground part from the CAPSYM.OLB part library. You can use any other ground part only if you change its name to 0 (zero).

To connect the parts

1. From the Place menu, choose Wire to begin wiring parts.
   The pointer changes to a crosshair.
2. Click the connection point (the very end) of the pin on the off-page connector at the input of the circuit.
3. Click the nearest connection point of the input resistor R1.
   To stop wiring, right-click and choose End Wire. The pointer changes to the default arrow.
   Clicking on any valid connection point ends a wire. A valid connection point is shown as a box (see Figure 2-3).
   

   Figure 2-3 Connection Points

   If you make a mistake when placing or connecting components:
   From the Edit menu, choose Undo, or click  .
4. Connect the other end of R1 to the output capacitor.
5. Connect the diodes to each other and to the wire between them:
   1. Click the connection point of the cathode for the lower diode.
   2. Move the cursor straight up and click the wire between the diodes. The wire ends, and the junction of the wire segments becomes visible.
   3. Click again on the junction to continue wiring.
   4. Click the end of the upper diode’s anode pin.
6. Continue connecting parts until the circuit is wired as shown in Figure 2-1.

To assign names (labels) to the nets

1. Choose Place – Net Alias to display the Place Net Alias dialog box. You can also click the Net Alias button ( ).
2. In the Name text box, type Mid.
3. Click OK.
4. Place the net alias on any segment of the wire that connects R1, R2, R3, the diodes, and the capacitor. The lower left corner of the net alias must touch the wire.
5. Right-click and choose End Mode to quit the Net Alias function.
   
   It is recommended that special characters should not be used for naming nets, nodes, projects, or libraries. While naming nets, characters such as ? (question mark), @ (at symbol), ~ (telda), #(hash), & (ampersand), %(percent sign), and “ (quotation marks) should not be used. These might cause the netlister to fail. Other special characters such as ! (exclamation mark), ( )(parenthesis), < (smaller than), = (equal), > (greater than), [ ](square parenthesis), and * (asterix) are also considered as illegal for naming nets.

To assign names (labels) to the off-page connectors

Label the off-page connectors as shown in Figure 2-1.

1. Double-click the name of an off-page connector to display the Display Properties dialog box.
2. In the Name text box, type the new name.
3. Click OK.
4. Select and relocate the new name as desired.

To assign names to the parts

1. Double-click the second VDC part to display the Parts spreadsheet.
2. Click in the first cell under the Reference column.
3. Type in the new name Vin.
4. Click Apply to update the changes to the part, then close the spreadsheet.
5. Continue naming the remaining parts until your schematic looks like Figure 2-1.
   
   A more efficient way to change the names, values and other properties of several parts in your design is to use the Property Editor, as follows:
   1. Select all of the parts to be modified by pressing Ctrl and clicking each part.
   2. From the Edit menu, choose Properties.
      The Parts Spreadsheet appears.
   Change the entries in as many of the cells as needed, and then click Apply to update all of the changes at once.

To change the values of the parts

1. Double-click the voltage label (0V) on V1 to display the Display Properties dialog box.
2. In the Value text box, type 5V.
3. Click OK.
4. Continue changing the Part Value properties of the parts until all the parts are defined as in Figure 2-1.
   Your schematic page should now have the same parts, wiring, labels, and properties as Figure 2-1.

Using European notation

You can use the European notation, such as 2K2, to assign values to resistors, capacitors, and inductors. Assigning values in this format reduces the possibility of errors while reading component values from screen or from a print out of the schematic. The table below lists the alphabets that can be used in the 2K2 notation.

Some examples and their explanations are listed in the table below.

To ignore a part in simulation

You can add the property PSPNETLIST_IGNORE to a part and set it to TRUE to ignore the part while simulating the design. In the Property Editor:

1. Click New Property.
2. Specify PSPNETLIST_IGNORE as the Name
3. Specify TRUE as the Value.
   The part is greyed out in the schematic and ignored while performing simulation.

To save your design

1. From the File menu, choose Save.

Using Design Entry HDL

This section describes how to use Project Manager to create a design project and then use Design Entry HDL to create the simple diode clipper design shown in Figure 2-4.

Figure 2-4 Diode clipper design

To create a new design project

1. Invoke Project Manager.
2. In Project Manager, choose File – New – New Design. Alternatively, click the Create Design Project button. The New Project Wizard appears.
3. In the Name text box, enter the name of the project as clipper.
   
   The project name can only have lower-case letters, numbers, and the underscore (_).
4. In the Location text box, enter the path to the directory where you want to create the project
5. Click Next. The Project Libraries dialog box appears.
6. Select analog from the list of Available Libraries, and click Add. The analog library is added to the Project Libraries list.
7. Add the following libraries as described in step 6 above:
   • diode
   • source
   • sourcstm
8. Click Next. The Design Name dialog box appears.
9. In the Design Name text box, enter the name of the top level design clipper.
   
   The design name can only have lower-case letters, numbers, and the underscore (_).
10. Click Next. The Summary dialog box displays the project details.
11. Click Finish to create the project.

To create the design

To create the design, you should invoke the Design Entry HDL schematic editor.

1. In Project Manager, click on the Design Entry button. Design Entry HDL appears.
2. Choose View – Toolbar.
   The Customize dialog box appears.
3. Select the Toolbars tab.
4. Select the check box against the Add, Edit, Analog, Discrete, Passive and Source toolbars and click OK.
   The toolbars are displayed in Design Entry HDL.
5. Drag the toolbars and dock them as shown in the figure below.
   

To place the voltage sources

1. Choose Component – Add. The Component Browser appears.
   
2. Select source from the Library list.
3. In the Cells list box, select VDC.
   
   Type a few characters of the part name you want to select in the Cells box to find the part.
4. Click Add.
5. Move the pointer to the correct position on the schematic page (see Figure 2-4) and click to place the first part.
6. Move the cursor and click again to place the second part.
7. Right-click and choose Done to stop placing parts.
   
   The Design Entry HDL libraries are located at the directory <install_dir>\share\library. To have access to specific parts of a library, you must first add the library to list of Project Libraries.
   To add a library:
   1. Click on the Setup icon in Project Manager. The Project Setup window appears.
   2. Select the Global tab.
   3. Select the library you want to add from the Available Libraries list.
   4. Click Add. The library gets added to the Project Libraries list.
   5. Click OK.

To place the diodes

1. In the Component Browser, choose diode from the Library list.
2. In the Cells box, type D1N39* to display a list of diodes that begin with D1N39.
3. Select D1N3940 and click Add.
4. Right-click on the Design Entry HDL design area and choose Rotate to rotate the diode to the correct orientation.
5. Click to place the first diode (D1), then click to place the second diode (D2).
   When placing parts:
   • Leave space to connect the parts with wires.
   • You will change part names and values that do not match those shown in Figure 2-4 later in this section.
   If you make a mistake when placing parts:
   • Choose Edit – Move. Click on the component and move the mouse pointer to the location where you want to place the part.
6. Right-click and choose Done to stop placing parts.

For each instance of a part you place, Design Entry HDL automatically assigns a PATH property. This property has a unique value that helps identify the instance. Values are I1, I2, I3....In.

To place the other parts

1. Choose Component – Add, if needed. Component Browser appears.
2. Select analog from the Library list.
3. Follow similar steps as described for the diodes to place the parts listed below, as in shown in Figure 2-1. The part names you need to select in the Cells list box of Component Browser are shown in parentheses:
   • resistors (R)
   • capacitor (C)
4. Select source from the Library list in the Component Browser.
5. Select 0 in the Cells list box and place the ground part (0) as shown in Figure 2-4.
   
   You must use the 0 (zero) ground part from the SOURCE library. You can use any other ground part only if you change its name to 0 (zero).

To connect the parts

1. Choose Wire – Draw to begin wiring parts.
   The pointer changes to a crosshair.
2. Click the connection point (the very end) of the pin on Vin (the VDC part at the input of the design).
3. Click the nearest connection point of the input resistor R1.
4. Connect the other end of R1 to the output capacitor.
5. Connect the diodes to each other and to the wire between them:
   1. Click the connection point of the cathode for the lower diode.
   2. Move the cursor straight up and click the wire between the diodes. The wire ends, and the junction of the wire segments becomes visible.
   3. Click again on the junction to continue wiring.
   4. Click the end of the upper diode’s anode pin.
6. Continue connecting parts until the design is wired as shown in Figure 2-4.

To stop wiring, right-click and choose Done. The mouse pointer changes to the default arrow.

To assign names (labels) to the nets

1. Choose Wire – Signal Name to display the Signal Name dialog box.
2. Select the Queue option.
3. In the Signal Names text box, type IN, MID, AD1 and OUT.
4. Click on any segment of the wire that connects Vin (the VDC part at the input of the design) and the input resistor R1.The name IN is assigned to the wire.
5. Click on any segment of the wire that connects the resistors, the diodes, and the capacitor. The name MID is assigned to the wire.
6. Click on the wire that connects R2 and V1. The name AD1 is assigned to the wire.
7. Click on the wire that extends to the right of the design from the capacitor C1. The name OUT is assigned to the wire.
8. Close the Signal Name dialog box.
   
   It is recommended that special characters should not be used for naming nets, nodes, projects, or libraries. While naming nets, characters such as ? (question mark), @ (at symbol), ~ (telda), #(hash), & (ampersand), %(percent sign), and “ (quotation marks) should not be used. These might cause the netlister to fail. Other special characters such as ! (exclamation mark), ( )(parenthesis), < (smaller than), = (equal), > (greater than), [ ](square parenthesis), and * (asterisk) are also considered as illegal for naming nets.

To change the values of the parts

1. Choose Text – Attributes.
2. Click on V1 to display the Attributes dialog box.
   
3. Click the Value text box against the VALUE property, and type 5V.
4. From the Visible list of the VALUE property, choose Visible.
5. Click OK.
6. Continue changing the VALUE properties of the parts until all the parts are defined as in Figure 2-4. Your schematic page should now have the same parts, wiring, labels, and properties as in Figure 2-4.

To save your design

1. From the File menu, choose Save.

When you save a design, Design Entry HDL runs the checks you specify from a list available at Tools – Options – Check. Design Entry HDL also runs another set of checks for connectivity errors.

Using Design Templates

PSpice A/D comes with a set of design templates covering basic electronics circuits and SMPS topologies. These design templates cover the range of analog, digital, and mixed designs. You can use the design templates, which are a combination of design and simulation profiles, as a starting point for new designs. These templates are also suitable for learning and demonstration purposes.

When you create a new project, you can select the Create based upon and existing project in the Create PSpice Project dialog box to select from a list of large number of design templates.

The design templates available under various design categories are:

Analog circuits

• Basic electronics circuits
  • Op-Amp based Differentiator and Integrator
  • Clipper Circuits:
    • Negative Peak Clipper
    • Symmetrical Clipper
  • Clamper Circuits:
    • Positive Peak Clamper
    • Negative Peak Clamper
  • Zener Diode Circuits:
    • Voltage Regulator
    • Voltage Clipper
• Voltage multipliers
  • Half Wave Voltage Doubler
  • Full Wave Voltage Doubler
• Switch Mode Power Supplies (SMPS)
  • DC-DC Converters:
    • Buck
    • Boost
    • Buck-Boost
    • Flyback
    • Single Switch Forward Converter
    • Double Switch Forward Converter

Digital circuits

• Counters
  • Mod-10
  • Ring
  • Ripple
  • Ripple-Down
  • Up-Down
  • Johnson
  • Decade
• Shift registers
  • Left-Right
  • Parallel In-Serial Out
  • Serial In-Parallel Out

Finding out more about setting up your design

About setting up a design for simulation

For a checklist of all of the things you need to do to set up your design for simulation, and how to avoid common problems.

Running PSpice A/D

When you perform a simulation, PSpice A/D generates an output file (*.OUT).

While PSpice A/D is running, the progress of the simulation appears and is updated in the PSpice simulation output window (see Figure 2-5).

Figure 2-5 PSpice simulation output window.

You can set up a simulation profile to run one analysis at a time. To run multiple analyses (for example, both DC sweep and transient analyses), set up a batch simulation.

Performing a bias point analysis

To set up a bias point analysis in Capture

1. In Capture, switch to CLIPPER.OPJ in the schematic page editor.
2. From the PSpice A/D menu, choose New Simulation Profile to display the New Simulation dialog box.
3. In the Name text box, type Bias.
4. From the Inherit From list, select None, then click Create.
   The Simulation Settings dialog box appears.
   The root schematic listed is the schematic page associated with the simulation profile you are creating.
5. From the Analysis type list, select Bias Point.
6. Click OK to close the Simulation Settings dialog box.

To simulate the circuit from within Capture

1. From the PSpice A/D menu, choose Run.
   PSpice A/D simulates the circuit and calculates the bias point information.

To set up a bias point analysis in Design Entry HDL

1. In Design Entry HDL, choose PSpice Simulator – New Simulation Profile to display the New Simulation dialog box.
2. In the Name text box, type Bias.
3. From the Inherit From list, select none, then click Create.
   The Simulation Settings dialog box appears.
   The root schematic listed is the schematic page associated with the simulation profile you are creating.
4. From the Analysis type list in the Analysis tab, select Bias Point.
5. Click OK to close the Simulation Settings dialog box.

To simulate the design from within Design Entry HDL

1. Choose PSpice Simulator – Run.
   PSpice A/D simulates the design and calculates the bias point information.

Using the simulation output file

The simulation output file acts as an audit trail of the simulation. This file optionally echoes the contents of the circuit file as well as the results of the bias point calculation. If there are any syntax errors in the netlist declarations or simulation commands, or anomalies while performing the calculation, PSpice A/D writes error or warning messages to the output file.

To view the simulation output file

1. In PSpice A/D, from the View menu, choose Output File.
   Figure 2-6 shows the results of the bias point calculation as written in the simulation output file.
   

   Figure 2-6 Simulation output file

2. When finished, close the window.

PSpice A/D measures the current through a two-terminal device into the first terminal and out of the second terminal. For voltage sources, current is measured from the positive terminal to the negative terminal; this is opposite to the positive current flow convention and results in a negative value in the output file.

DC sweep analysis

You can visually verify the DC response of the clipper by performing a DC sweep of the input voltage source and displaying the waveform results in the Probe window in PSpice A/D. This example sets up DC sweep analysis parameters to sweep Vin from -10 to 15 volts in 1 volt increments.

Setting up and running a DC sweep analysis

To set up and run a DC sweep analysis

1. In the design entry tool3, from the PSpice A/D menu, choose New Simulation Profile.
   The New Simulation dialog box appears.
2. In the Name text box, type Example.
3. From the Inherit From list, select Schematic1-Bias.
4. Click Create.
   The Simulation Settings dialog box appears.
5. Click the Analysis tab.
6. From the Analysis Type list, select DC Sweep and enter the values shown in Figure 2-7.
   
   The default settings for DC Sweep simulation are Voltage source as the swept variable type and Linear as the sweep type. To use a different swept variable type or sweep type, choose different options under Sweep Variable and Sweep Type sections.
   

   Figure 2-7 DC Sweep analysis settings

7. Click OK to close the Simulation Settings dialog box.
8. From the File menu, choose Save.
9. From the PSpice menu, choose Run to run the analysis.

Displaying DC analysis results

Probe windows can appear during or after the simulation is finished.

To plot voltages at nets In and Mid

1. In PSpice A/D, choose Trace – Add Trace.
2. In the Add Traces dialog box, select V(In) and V(Mid).
3. Click OK.

To display a trace using a markeror probe

1. In Capture’s PSpice menu, point to Markers and choose Voltage Level. In Design Entry HDL, choose Probes - Voltage Probe from the PSpice menu.
2. Click to place a marker on net Out, as shown in Figure 2-8.
   

   Figure 2-8 Clipper circuit with voltage marker on net Out.

3. Right-click and choose End Mode in Capture or Done in Design Entry HDL to stop placing markers.
4. From the File menu, choose Save.
5. Switch to PSpice A/D. The V(Out) waveform trace appears, as shown in Figure 2-9.
   

   Figure 2-9 Voltage at In, Mid, and Out

To place cursors on V(In) and V(Mid)

This example uses the cursors feature to view the numeric values for two traces and the difference between them by placing a cursor on each trace.

1. From PSpice A/D’s Trace menu, point to Cursor and choose Display.
   Two cursors appear for the first trace defined in the legend below the x-axis—V(In) in this example. The Probe Cursor window also appears.
2. To display the cursor crosshairs:
   1. Position the mouse anywhere inside the Probe window.
   2. Click to display the crosshairs for the first cursor.
   3. Right-click to display the crosshairs for the second cursor.

Association of cursors with mouse buttons.

In the trace legend, the part for V(In) is outlined in the crosshair pattern for each cursor, resulting in a dashed line as shown in Figure 2-10.

Figure 2-10 Trace legend with cursors

1. Place the first cursor on the V(In) waveform:
   1. Click the portion of the V(In) trace in the proximity of 4 volts on the x-axis. The cursor crosshair appears, and the current X and Y values for the first cursor appear in the cursor window.
   2. To fine-tune the cursor location to 4 volts on the x-axis, drag the crosshairs until the x-axis value of the A1 cursor in the cursor window is approximately 4.0. You can also press Right arrow key and Left arrow key for tighter control.
      
      Your ability to get as close to 4.0 as possible depends on screen resolution and window size.
2. Place the second cursor on the V(Mid) waveform:
   1. Right-click the trace legend part (diamond) for V(Mid) to associate the second cursor with the Mid waveform. The crosshair pattern for the second cursor outlines the V(Mid) trace part as shown in Figure 2-11.
      

      Figure 2-11 Trace legend with V(Mid) symbol outlined

   2. Right-click the portion on the V(Mid) trace that is in the proximity of 4 volts on the x-axis. The X and Y values for the second cursor appear in the cursor window along with the difference (dif) between the two cursors’ X and Y values.
   3. To fine-tune the location of the second cursor to 4 volts on the x-axis, drag the crosshairs until the x-axis value of the A2 cursor in the cursor window is approximately 4.0. You can also press Shift+Right arrow key and Shift+Left arrow key for tighter control.

Figure 2-12 shows the Probe window with both cursors placed.

Figure 2-12 Voltage difference at V(In) = 4 volts.

There are also ways to display the difference between two voltages as a trace:

• In PSpice A/D, add the trace expression V(In)-V(Mid).
• In Capture, from the PSpice menu, point to Markers and choose Voltage Differential. Place the two markers on different pins or wires.
  In Design Entry HDL, from the PSpice Simulator menu, choose Probes - Differential Probe.

To delete all of the traces

1. From the Trace menu, choose Delete All Traces.
   
   You can also delete an individual trace by selecting its name in the trace legend and then pressing D elete. Example: To delete the V(In) trace, click the text, V(In), located under the plot’s x-axis, and then press Delete.
   At this point, the design has been saved. If needed, you can quit the design entry tool and PSpice A/D and complete the remaining analysis exercises later using the saved design.

Transient analysis

The examples in this section show how to run a transient analysis on the clipper circuit. This requires adding a time-domain voltage stimulus as shown in the following figures.

Figure 2-13 Diode clipper circuit with a voltage stimulus in Capture

To add a time-domain voltage stimulus in Capture

1. From the design entry tool’s PSpice menu, point to Markers and choose Delete All.
2. Select the ground part beneath the VIN source.
3. From the Edit menu, choose Cut.
4. Scroll down (or from the View menu, point to Zoom, then choose Out).
5. Place a VSTIM part (from the PSpice library SOURCSTM) as shown in figure below.
6. From the Edit menu, choose Paste.
7. Place the ground part under the VSTIM part as shown in figure below.
8. From the View menu, point to Zoom, then choose All.
9. From the File menu, choose Save to save the design.

To add a time-domain voltage stimulus in Design Entry HDL

1. In Design Entry HDL, choose PSpice Simulator – Probes – View Probes. The Probes dialog box appears.
2. Click Remove All.
3. Click Close to close the Probes dialog box.
4. Place a VSTIM part (from the PSpice library sourcstm) as shown in figure below.
5. From the Text menu, choose Attributes.
6. Click on the VSTIM part to display the Attributes dialog box.
   
7. Change the value of the IMPLEMENTATION property to SINE. This specifies the name of the stimulus.
8. Click OK to close the Attributes dialog box.
9. From the File menu, choose Save to save the design.

To set up the stimulus

1. Select the VSTIM part (V3).
2. In Capture, choose Edit - PSpice Stimulus. In Design Entry HDL, right-click and choose Edit Stimulus.
   The New Stimulus dialog box appears.
3. In the New Stimulus dialog box, type SINE.
4. Click SIN (sinusoidal), then click OK.
5. In the SIN Attributes dialog box, set the first three properties as follows:
   Offset value = 0 Amplitude = 10 Frequency (Hz) = 1kHz
6. Click Apply to view the waveform.
   The Stimulus Editor window should look like the following figure.
   
7. Click OK.
8. Choose File – Save to save the stimulus information. Click Yes to update the schematic.
9. Choose File – Exit to exit the Stimulus Editor.

If you do not have the Stimulus Editor

1. Place a VSIN part instead of VSTIM and double-click it.
2. In Capture, in the Edit Part dialog box, click User Properties.
   In Design Entry HDL:
   1. Choose Text - Attributes.
   2. Click on the VSIN part to display the Attributes dialog box.
3. Set values for the VOFF, VAMPL, and FREQ properties as defined in step 5. When finished, click OK.

To set up and run the transient analysis

1. From the design entry tool’s PSpice menu, choose New Simulation Profile.
   The New Simulation dialog box appears.
2. In the Name text box, type Transient.
3. From the Inherit From list, select Schematic1-Example.
4. Click Create.
   The Simulation Settings dialog box appears.
5. Click the Analysis tab.
6. From the Analysis Type list, select Time Domain (Transient) and specify the settings shown in the following figure.
   TSTOP = 2ms
   Start saving data after = 20ns
   

   Figure 2-14 Transient analysis simulation settings

7. Click OK to close the Simulation Settings dialog box.
8. From the PSpice menu, choose Run to perform the analysis.
   PSpice A/D uses its own internal time steps for computation. The internal time step is adjusted according to the requirements of the transient analysis as it proceeds. PSpice A/D saves data to the waveform data file for each internal time step.
   
   The internal time step is different from the Print Step value. Print Step controls how often optional text format data is written to the simulation output file (*.OUT).

To display the input sine wave and clipped wave at V(Out)

1. From PSpice A/D’s Trace menu, choose Add Trace.
2. In the trace list, select V(In) and V(Out) by clicking them.
3. Click OK to display the traces.
4. From the Tools menu, choose Options to display the Probe Settings dialog box.
5. In the Use Symbols frame, click Always if it is not already enabled.
6. Click OK.
   

Sinusoidal input and clipped output waveforms.

The waveforms illustrate the clipping of the input signal.

AC sweep analysis

The AC sweep analysis in PSpice A/D is a linear (or small signal) frequency domain analysis that can be used to observe the frequency response of any circuit at its bias point.

Setting up and running an AC sweep analysis

In this example, you will set up the clipper circuit for AC analysis by adding an AC voltage source for a stimulus signal (see Figure 2-15 and Figure  2-16) and by setting up AC sweep parameters.

Figure 2-15 Clipper circuit with AC stimulus in Capture

Figure 2-16 Clipper design with AC stimulus in Design Entry HDL

To change Vin to include the AC stimulus signal in Capture

1. In Capture, open CLIPPER.OPJ.
2. Select the DC voltage source, Vin, and press D to remove the part from the schematic page.
3. From the Place menu, choose Part.
4. In the Part text box, type VAC (from the PSpice library SOURCE.OLB) and click OK.
5. Place the AC voltage source on the schematic page, as shown in Figure 2-15.
6. Double-click the VAC part (0V) to display the Parts spreadsheet.
7. Change the Reference cell to Vin and change the ACMAG cell to 1V .
   
   PSpice simulation is not case-sensitive, so both M and m can be used as “milli,” and MEG, Meg, and meg can all be used for “mega.” However, waveform analysis treats M and m as mega and milli, respectively.
8. Click Apply to update the changes and then close the spreadsheet.

To change Vin to include the AC stimulus signal in Design Entry HDL

1. In Design Entry HDL, open clipper.cpm.
2. From the Edit menu, choose Delete.
3. Select the DC voltage source, Vin to delete it.
4. From the Component menu, choose Add. Component Browser appears.
5. From the Library list, choose source.
6. In the Cells list box, select VAC and place the part on the schematic page as shown in Figure 2-16.
7. Click Close to close the Component Browser.
8. From the Text menu, choose Attributes.
9. Click on the VAC part (0V) to display the Attributes dialog box.
10. Change the Reference cell to Vin and change the value of the ACMAG property to 1V .
    
    PSpice simulation is not case-sensitive, so both M and m can be used as “milli,” and MEG, Meg, and meg can all be used for “mega.” However, waveform analysis treats M and m as mega and milli, respectively.
11. Click OK to close the Attributes dialog box.
12. From the File menu, choose Save.

To set up and run the AC sweep simulation

1. From design entry tool’s PSpice menu, choose New Simulation Profile.
2. In the Name text box, enter AC_Sweep.
3. Click Create.
   The Simulation Settings dialog box appears.
4. Click the Analysis tab.
5. From the Analysis Type list, select AC Sweep/Noise and enter the settings shown in Figure 2-17.
   

   Figure 2-17 AC sweep and noise analysis simulation settings.

6. Click OK to close the Simulation Settings dialog box.
7. From the PSpice menu, choose Run to start the simulation.
   PSpice A/D performs the AC analysis.

To add markers for waveform analysis in Capture

1. From Capture’s PSpice menu, point to Markers, point to Advanced, then choose db Magnitude of Voltage.
   
   You must first define a simulation profile for the AC Sweep/Noise analysis in order to use advanced markers.
2. Place one Vdb marker on the Out net, then place another on the Mid net.
3. From the File menu, choose Save to save the design.

AC sweep analysis results

PSpice A/D displays the dB magnitude (20log10) of the voltage at the marked nets, Out and Mid, in a Probe window as shown in Figure 2-20 below. VDB(Mid) has a lowpass response due to the diode capacitances to ground. The output capacitance and load resistor act as a highpass filter, so the overall response, illustrated by VDB(out), is a bandpass response. Because AC is a linear analysis and the input voltage was set to 1V, the output voltage is the same as the gain (or attenuation) of the circuit.

Figure 2-18 dB magnitude curves for “gain” at Mid and Out.

To display a Bode plot of the output voltage, including phase

1. From the design entry tool’s PSpice menu, point to Markers, point to Advanced and choose Phase of Voltage.
2. Place a Vphase marker on the output next to the Vdb marker.
   
   Depending upon where the Vphase marker was placed, the trace name may be different, such as VP(Cout:2), VP(R4:1).
3. Delete the Vdb marker on Mid.
4. Switch to PSpice A/D.
   In the Probe window, the gain and phase plots both appear on the same graph with the same scale.
   For more information on Probe windows and trace expressions.”
5. Click the trace name VP(Out) to select the trace.
6. From the Edit menu, choose Cut.
7. From the Plot menu, choose Add Y Axis.
8. From the Edit menu, choose Paste.
   The Bode plot appears, as shown in Figure 2-19.
   

Figure 2-19 Bode plot of clipper’s frequency response.

Parametric analysis

This example shows the effect of varying input resistance on the bandwidth and gain of the clipper circuit by:

• Changing the value of R1 to the expression {Rval}.
• Placing a PARAM part to declare the parameter Rval.
• Setting up and running a parametric analysis to step the value of R1 using Rval.
  

Figure 2-20 Clipper circuit with global parameter Rval in Capture.

Figure 2-21 Clipper design with global parameter Rval in Design Entry HDL.

This example produces multiple analysis runs, each with a different value of R1. After the analysis is complete, you can analyze curve families for the analysis runs using PSpice A/D.

Setting up and running the parametric analysis

To change the value of R1 to the expression {Rval} in Capture

1. In Capture, open CLIPPER.OPJ.
2. Double-click the value (1k) of part R1 to display the Display Properties dialog box.
3. In the Value text box, replace 1k with {Rval}.
   PSpice A/D interprets text in curly braces as an expression that evaluates to a numerical value. This example uses the simplest form of an expression—a constant. The value of R1 will take on the value of the Rval parameter, whatever it may be.
4. Click OK.

To change the value of R1 to the expression {Rval} in Design Entry HDL

1. In Design Entry HDL, open clipper.CPM.
2. Choose Text – Attributes.
3. Click on the part R1 to display the Attributes dialog box.
4. In the Value text box against the VALUE property, replace 1k with {Rval}.
   PSpice A/D interprets text in curly braces as an expression that evaluates to a numerical value. This example uses the simplest form of an expression—a constant. The value of R1 will take on the value of the Rval parameter, whatever it may be.
5. Click OK.

To add a PARAM part to declare the parameter Rval in Capture

1. From Capture’s Place menu, choose Part.
2. In the Part text box, type PARAM (from the PSpice library SPECIAL.OLB), then click OK.
3. Place one PARAM part in any open area on the schematic page.
4. Double-click the PARAM part to display the Parts spreadsheet, then click New Column.
   For more information about using the Parts spreadsheet, see the OrCAD Capture User Guide.
5. In the Name text box, enter Rval (no curly braces), then click OK.
   This creates a new property for the PARAM part, as shown by the new column labeled Rval in the spreadsheet.
6. Click in the cell below the Rval column and enter 1k as the initial value of the parametric sweep.
7. While this cell is still selected, click Display.
8. In the Display Format frame, select Name and Value, then click OK.
9. Click Apply to update all the changes to the PARAM part.
10. Close the Parts spreadsheet.
11. Select the VP marker and press Delete to remove the marker from the schematic page.
    
    This example is only interested in the magnitude of the response.
12. From the File menu, choose Save to save the design.

To add a PARAM part to declare the parameter Rval in Design Entry HDL

1. Choose Component – Add.
   Component Browser appears.
2. From the Library list, choose special.
3. Place one PARAM part in any open area on the schematic page.
4. Close Component Browser.
5. Choose Text – Attributes to display the Attributes dialog box.
6. Click Add.
7. In the Name text box, enter RVAL (no curly braces).
   This creates a new property for the PARAM part, as shown by the new row labeled RVAL in the Attributes dialog box.
8. In the Value text box, enter 1k as the initial value of the parametric sweep.
9. Click OK to close the Attributes dialog box.
10. Save the design.
11. Switch to PSpice A/D.
12. Click the trace name Vp(out) and press Delete to remove the trace.

To set up and run a parametric analysis to step the value of R1 using Rval

1. From the design entry tool’s PSpice menu, choose New Simulation Profile.
   The New Simulation dialog box appears.
2. In the Name text box, type Parametric.
3. From the Inherit From list, select AC_Sweep, then click Create.
   The Simulation Settings dialog box appears.
   The root schematic listed is the schematic page associated with the simulation profile you are creating.
4. Click the Analysis tab.
5. Under Options, select Parametric Sweep and enter the settings as shown below.
   

Parametric simulation settings

This profile specifies that the parameter Rval is to be stepped from 100 to 10k logarithmically with a resolution of 10 points per decade.

The analysis is run for each value of Rval. Because the value of R1 is defined as {Rval}, the analysis is run for each value of R1 as it logarithmically increases from 100Ω to 10 k

1. Click OK.
2. From the PSpice menu, choose Run to start the analysis.

Analyzing waveform families

Continuing from the example above, there are 21 analysis runs, each with a different value of R1. After PSpice A/D completes the simulation, the Available Sections dialog box appears, listing all 21 runs and the Rval parameter value for each. You can select one or more runs to display. To select individual runs, click each one separately.

To display all 21 traces

1. In the Available Sections dialog box, click OK.
   All 21 traces (the entire family of curves) for VDB(Out) appear in the Probe window as shown in Figure 2-22.
   

   Figure 2-22 Small signal response as R1 is varied from 100Ω to 10 kΩ.

   To see more information about the section that produced a specific trace, double-click the corresponding symbol in the legend below the x-axis.
2. Click the trace name to select it, then press Delete to remove the traces shown.
   You can also remove the traces by removing the VDB marker from your schematic page in Capture.

To compare the last run to the first run

1. From the Trace menu, choose Add Trace to display the Add Traces dialog box.
2. In the Trace Expression text box, type the following:
   

   V(Out)@1 V(Out)@21

   You can avoid some of the typing for the Trace Expression text box by selecting V(Out) twice in the trace list and inserting text where appropriate in the resulting Trace Expression.
3. Click OK.

1. Plot the new trace by specifying a waveform expression:
   1. From the Trace menu, choose Add Trace.
   2. In the Trace Expression text box, type the following waveform expression:
      

       V(Out)@1-V(OUT)@21

   3. Click OK.
2. Use the search commands to find the value of the difference trace at its maximum and at a specific frequency:
   1. From the Trace menu, point to Cursor and choose Display.
   2. Right-click then left-click the trace part (triangle) for Vdb(Out)@1 - Vdb(Out)@21. Make sure that you left-click last to make cursor 1 the active cursor.
   3. From the Trace menu, point to Cursor and choose Max.
   4. From the Trace menu, point to Cursor and choose Search Commands.
   5. In the Search Command text box, type the following:
      

      search forward x value (100)

      The search command tells PSpice A/D to search for the point on the trace where the x-axis value is 100.
   6. Select 2 as the Cursor to Move option.
   7. Click OK.
   Figure 2-23 shows the Probe window with cursors placed.
   

   Figure 2-23 Small signal frequency response at 100 and 10 kΩ input resistance.

   Note that the Y value for cursor 2 in the cursor box is about 17.87. This indicates that when R1 is set to 10 kΩ, the small signal attenuation of the circuit at 100Hz is 17.87dB greater than when R1 is 100Ω.

3. From the Trace menu, point to Cursor and choose Display to turn off the display of the cursors.
4. Delete the trace.

Performance analysis

Performance analysis is an advanced feature in PSpice A/D that you can use to compare the characteristics of a family of waveforms. Performance analysis uses the principle of search commands introduced earlier in this chapter to define functions that detect points on each curve in the family.

After you define these functions, you can apply them to a family of waveforms and produce traces that are a function of the variable that changed within the family.

This example shows how to use performance analysis to view the dependence of circuit characteristics on a swept parameter. In this case, the small signal bandwidth and gain of the clipper circuit are plotted against the swept input resistance value.

To plot bandwidth vs. Rval using the performance analysis wizard

1. In Capture, open CLIPPER.OPJ.
   In Design Entry HDL, open CLIPPER.CPM.
2. From PSpice A/D’s Trace menu, choose Performance Analysis.
   The Performance Analysis dialog box appears with information about the currently loaded data and performance analysis in general.
   
   The Performance Analysis menu item is only available if an analysis data file is available. In this case, the data from the parametric analysis of the previous example should still be open.
3. Click the Wizard button.
   At each step, the wizard provides information and guidelines.
4. Click the Next> button.
5. In the Choose a Measurement box, click Bandwidth, then click the Next> button.
6. Click in the Name of Trace to search text box and type V(Out).
7. Click in the db level down for bandwidth calc text box and type 3.
8. Click the Next> button.
   The wizard displays the gain trace for the first run (R=100) and shows how the bandwidth is measured. This is done to test the measurement.
9. Click the Next> button or the Finish button.
   A plot of the 3dB bandwidth vs. Rval appears.
10. Change the x-axis to log scale:
    1. From the Plot menu, choose Axis Settings.
    2. Click the X Axis tab.
    3. Under Scale, choose Log.
    4. Click OK.

To plot gain vs. Rval manually

1. From the Plot menu, choose Add Y Axis.
2. From the Trace menu, choose Add Trace to display the Add Traces dialog box.
3. In the Functions or Macros frame, select the Measurements list, and then click the Max(1) measurement.
   The Trace list includes measurements expressions only in performance analysis mode when the x-axis variable is the swept parameter.
4. In the Simulation Output Variables list, click V(out).
5. In the Trace Expression text box, edit the text to be Max(V(out)), then click OK.
   PSpice A/D displays gain on the second y-axis vs. Rval.

Figure 2-24 shows the final performance analysis plot of 3dB bandwidth and gain in dB vs. the swept input resistance value.

Figure 2-24 Performance analysis plots of bandwidth and gain vs. Rval.