Section 16 – PCB Design: Vendor Management

This is the last section in the back-to-school series for PCB Designers and those who may want to know more about it. 

Contents

Vendor Management

As the designer, manufacturability, reliability and performance are in your hands. When something gets in the way of those goals, pushing back as the lone voice of reason isn’t enough. If your internal stakeholders don’t want to hear what you have to say, it’s time to loop in the outside vendor(s) for another opinion.

“ Handling this correctly in the first place enhances your reputation for getting things done.”

Your team might be creating a more difficult process but it’s ok as long as everyone is aware and onboard. A collective decision that the product will have a higher production cost is one thing.  “I told you so” isn’t going to cover your six-o-clock in the aftermath of a lost opportunity. “We told you so” at least spreads the risk. Vendors end up feeling the brunt of those challenges so they have to be in the loop. Handling this correctly in the first place enhances your reputation for getting things done.

Assembly floor of an electronic production factory

Figure 1. Image Credit: Author - The humming assembly floor is where the machines finally come to life.

Getting Your Impedance Message Across

We have to start somewhere. The easy way is to have a "ball-park" stack-up and line width and let the vendor roll with it. They may ask for material substitutions to use equivalent material. It may have equivalent dimensions but different dielectric constants. If you're ok with whatever comes out of the factory, then it's ok. That's your preferred plan but I'm not so sure you will get consistent results from one vendor to another.

Not Defining the Impedance Callouts

Another way that I’ll refer to as the Qualcomm way would be to prescribe exact materials and not allow substitutions for the reference designs. You would not call out impedance requirements in that case. They become a product of the materials used along with the designed trace geometry. If the vendor built the board using anything but the exact materials, then performance was their problem. No deal without getting a good hard look at the proposed construction.

The more accurate way is to get the stack-up and line width(s) from the vendor up front and use those materials and geometries. That's the Microsoft way. The fab shops would give us that information without NRE charges. That's my advice if you can swing it. It pays to have a relationship with the vendor.

Optionally, telling the vendor that specific line widths are meant to be a certain impedance in the notes works too. This typically involves the generation of an impedance table that specifies all of the impedance requirements for each routing layer and reference planes as required. For single ended impedance, that is just a line width. For differential routing, a line width and an air-gap is necessary. How you handle neck-down regions is another matter. Of course, you’ll need to be prepared to adjust your design based on their feedback.

Asking the fabricator to test and prove the impedance is within the stated tolerance is advisable since there are so many factors in play. Requiring test coupons is normal for quick development when a good impedance is required. The typical notes would allow the vendor to use alternate materials and adjust line widths by a certain small percentage, say 10%. Deviation more than that would require a consultation with you. The exact amount of latitude would depend on your comfort zone.

Working end of USB Type-C flex circuit next to a penny

Figure 2. Image Credit: Author - The working end of a USB type-C flex. Flex vendors are very good at some things and not always that good at everything. They said they couldn’t follow the tolerances on the fab drawing for this flex. We ended up making them responsible for the turnkey flex with connectors and ESD dordes pre-installed. We’re out of the middle.

Design Reuse Can Be Useful But Always Recertify the Plan

My most recent board design reused a stack-up. When we sent the vendor’s own previously recommended stack-up back to them for approval, you know and I know what happened next. I got to go through the board and revise all of the 50 ohm and 100 ohm differential line-widths. Don't forget to update the design rules, the stack-up geometry and the impedance table!

Aside from the stack-up, technical questions are likely to arise once the vendor has your data in their hands. It is usually a question of plating, especially the barrel thickness of the vias. The amount of plating the vias can get is a function of the minimum air-gap on the outer layer. Our trace/space geometry hems them in.

There are a variety of potential questions that may arise. Hole tolerances are another common negotiating point. The goal is to avoid providing missing or conflicting information. The clock is ticking once you get the list of waivers so it’s better to be agreeable when there is a hot job on the plate.

Digging in your heels over a feature that is part of a vendor’s recommended footprint might be an exception to this advice. If the fabricator says they can’t meet the spec, then you’re in the middle. This is a risky situation. You have to pull strings on both sides to get a representative of the fab shop and the part supplier to agree on a way forward. One of the things about a high-priority job is that you sure don’t have a second chance.

Graduate School Zone: PCB Designers as Vendors

To get from the first stage to the last, Our plan is to loop in the help we need at key points in the timeline. You know what progress looks like, right? You know what the schedule is. So keeping progress and time in alignment is the big picture here. Hitting the market window is a requirement of a design win. This is why we need access to a second shift when we’re done for the day.

Freelance PCB Design is a cottage industry with global reach. Your design might be best served spending the night on another continent. One of the hallmarks of a good service bureau is having offices in different time-zones. The amount of work I do in Silicon Valley?  I could do just as much in Fiji. Spring time might be wet but CAD is indoor work so we’re good.

The point is that you need this outside layout option on tap to execute an aggressive schedule. You have your finger on the pulse of all of your projects and there is always at least one that is on a fast track. Pull them into the hottest job and define the scope of their effort on an on-going basis.

Office materials wrapped in aluminum foil

Figure 3. Image Credit: Author - Always be prepared for a minor roadblock. Delays are inevitable.

Your design partner’s work will be a reflection of the information you give both verbally and in terms of design rules. Put yourself in their shoes for a moment. A remote meeting or call that goes with each hand-off is a really good investment in everyone’s time; once a day minimum.

Now that you actually have your job done a day early, don’t squander that lead with a slow procurement cycle. The first thing that will snag you is materials if you didn’t square that away with the fabrication vendor before routing got started.

A clean desk with outside view of pink flowers

Figure 4. Image Credit: Author - A clean desk is more productive

Board design will humble you, confuse you, inspire you, madden you, give your confidence, take it away, give it back. Doing this job takes determination and attention to detail. From sat-comm to wireless, to consumer electronics, autonomy, mixed reality, and back to sat-comm, I’ve had a long ride and it was a labor of love to bring it to you in this series. Thanks for reading.

More from John Burkhert
https://resources.pcb.cadence.com/authors/john-burkhert

Other Resources:

  • PCB Guidelines for Reduced EMI - Texas Instruments
  • High-Speed Board Layout Guidelines  - Altera (Intel)
  • High Speed Constraint Values and PCB Layout Methods - Charles Pfeil

Dedication

Writing for a living is great and I couldn’t do it without the support and affection of my cherished wife and children.

Acknowledgments

This text would not have been likely to happen without my sponsors at Cadence; my manager, Darin Ten Bruggencate, and the editors of my blog, Deepti Bankapur and Meeta Nayyar. Thanks to my support people at EMA Design Automation, Manny Marcano and Robin Sellers. I also want to thank Sophi Kravitz who discovered my writing and gave me my professional start on behalf of Supply Frame Hardware.

Many thanks to Gary Ferrari who probably doesn’t remember me but worked as the instructor of my CID+ certification and said some things that stick. Thanks to my mentor, Matt Tenuta who advised me to keep on writing after the first few articles on Linkedin didn’t really go anywhere. Most of all, thanks to the many readers of those stories who supported me with comments, messages, sharing, and, in particular, the questions that needed answers. You all exposed a burning need for this effort.

About the Author

John Burkhert

John Burkhert Jr is a career PCB Designer experienced in Military, Telecom, Consumer Hardware and lately, the Automotive industry. Originally, an RF specialist -- compelled to flip the bit now and then to fill the need for high-speed digital design. John enjoys playing bass and racing bikes when he's not writing about or performing PCB layout. You can find John on LinkedIn.

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Section 15 – PCB Design: Creating a Document Package
Section 15 – PCB Design: Creating a Document Package

Learn about documentation, assembly drawings, projecting views, and more

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