This is the introduction to a back-to-school series for PCB Designers and those who may want to know more about it.
This series is for anyone who wants to design their own printed circuit boards or perform designs for others. While an electronics degree is not required, beginners would do well to consider basic electronic theory as a prerequisite. Each part ends with a Graduate School Zone where more advanced techniques are discussed. Beginners may want to skip those sections and those who have the rudiments down might skip ahead to those sections.
PCB Design is at the crossroads of mechanical and electrical domains. One day, you’re working with geometric dimensioning and tolerancing, and the next day you’re calculating temperature rise on a power plane. In between these two camps, there is a raft of technology that is particular to printed circuit boards.
Combining an assortment of components that perform a function, and integrating that function with one or more others is at the heart of PCB layout. A component can have two pins or two thousand pins. It can cost a penny or hundreds of dollars. It can be bought off the shelf or custom ordered with a lead time that runs into months. Every PCB is a custom carrier for a selection of parts that, hopefully, do something useful. Let’s get started with a summary of each section to come.
The stack-up is the foundation of a PCB Design. The materials chosen will drive the geometry for controlled impedance, especially line width on outer and inner routing layers. The dielectric materials, in particular, come in many variations.
Key Metrics for the Dielectrics
- Glass transition temperature (Tg) is the upper thermal limit for soldering.
- Dielectric constant (Er or Dk) affects the impedance calculations.
- Loss Tangent which determines the suitability for high-speed connections.
Section one discusses single and multi-layer stack-ups as well as the importance of keeping a balanced stack-up. Lastly, an introduction to flex and rigid-flex stack-ups is covered.
The components of a PCB are instantiated in the schematic and transferred to the PCB layout through a logical net-list The PCB can be no better than the underlying footprints. Like the pieces of a jigsaw puzzle, the geometry and data of the individual pieces give rise to the whole. Components are represented by symbols in the schematic and by footprints on the PCB layout.
Components are broken into two broad types as well as two technologies.
- Passive components are generally two-pin devices but also include connectors.
- Active components are distinguished by the presence of integrated electronics.
- Through-hole components are the original breed of parts and, as it says, make use of pins that protrude through the PCB.
- Surface mount components are the type that does not have through-hole pins but rather make use of gull-wing or J-leads and also include ball-grid arrays and chip components.
Section two discusses these variations as well as some of the data that may be baked into the footprints in order to facilitate fabrication, assembly, and test.
The PCB outline is normally generated in MCAD software and transferred to the ECAD tool via a few different methods. The board outline may also have a step-and-repeat panel that is optimized for assembly. The assembly sub-panel is then arrayed in a larger fabrication panel. The various arrays are often carried out by the fabricator in conjunction with the assembly team. The PCB Designer usually coordinates these efforts if they are not done under the same roof as in a contract manufacturer situation.
PCB Outline Drawings Include:
- Dimensions and tolerances for all of the main features including length, width, and thickness of the PCB.
- Component keep-outs and/or height restriction areas.
- Location of components that are driven by the final assembly such as connectors and indicator lights.
- Views and details as necessary to describe the final product.
Section three discusses various methods of depanelization, V-score, and routing out the board outline with a mill or a laser. Adding tooling holes and fiducials to the panel’s break-off areas when the actual board does not have the space is also included. Lastly, we look at generating unusual shapes and controlling tight geometric requirements.
Picking up on section two, placement is the art of organizing the components for optimum routing. There are some rules of thumb for things like decoupling capacitors and crystals where proximity to other items is key. Alternately, some component types want to be isolated from the rest.
Steps to Consider for a Robust Placement:
- Logic verification: Sometimes, the netlist will fail to load for one reason or another. There may also be some mistakes made in the abstract world of the schematic that becomes apparent during placement.
- Floorplanning is to placement what a block diagram is to a schematic; a high-level representation of the details that can be used as a starting point.
- The unique requirements and quirks of analog boards as related to component placement.
- Managing thermal performance.
- Considering rework and test requirements.
Section four is as close as we get to the schematic. The net names are signposts for critical nets that drive placement. Instructions throughout the schematic can clarify requirements such as what parts go under an EMI shield or on the bottom side of the board. Rules may be based in the schematic and transferred via the netlist or they may be created at the board level during the placement phase.
Fanout is where we prove out the placement and pave the way for clean routing. When a PCB has to be high reliability, there is a design rule requiring larger capture pads for the vias. Room must be allocated for the type of technology to be used. We call this a study because we don’t always know the answer until we try.
Decisions Made During Fanout Studies:
- Layer count including provisions for isolating certain signals and escaping from the inner areas of a ball grid array device.
- Allocating layers for routing signals, power & ground planes as well as mixed usage layers as needed.
- Whether the PCB requires high-density interconnect technology.
Section five ties the first four sections together and covers fan-out in the context of high-speed differential pairs and also miniaturization of the components including chip-on-board (COB) and micro-BGA’s. We end with power planes and efforts to ensure their integrity through early simulation.
When non-board-designers imagine a PCB, this is what comes to mind. It’s an image dominated by lines that are all the same width but roam around almost aimlessly. The artistic conceptions are not too far off but there is always a tell for the trained eye.
Digital routing leans heavily on differential pairs to extend the reach of a connection while battling the effects of cross-talk. The other hallmark is the use of busses of four or more signals.
Digital Routing Constraints Include:
- Length matching of lines within a group. There is typically a clock net against which all others in the match group are measured.
- Phase matching of differential pairs such that the complementary traces are kept in tune along their entire length.
- Accounting for high-speed parasitics, line loss, skin effect, ground loops, etc.
Section six dives into these subjects providing concrete examples and anecdotes comparing low-frequency sound waves to those in the higher end of the spectrum.
Digital routing is a very broad subject that continues over this and the next section. Here, we break down a number of different bus architectures before moving on to a full section devoted to memory routing.
Common Bus Types Covered in This Section:
- HDMI and others
Section seven looks at these things as a four-dimensional puzzle to solve for space and time. We dissect an example layer and also discuss some “graduate school’ techniques for when things get a little dodgy.
Probably the longest section and it still only covers the surface; memory routing is one of the most complex tasks on our plate. From generating the constraint set to actually fleshing it out so that all of the design rules are met, this is an advanced topic all the way.
Aspects of memory routing:
- Volatile vs. non-volatile memory
- Read-only memory (ROM)
- Random Access Memory (RAM)
- Various flavors of RAM; SRAM, DRAM, Double Data Rate (DDR), and High Bandwidth Memory
Section 8 walks through some history and vocabulary to give an overview before diving into the DDR end of the pool. At that juncture, a detailed list of ten steps is outlined to get you from start to finish of the routing portion.
Doing a layout of RF circuitry can be daunting. You almost have to flip the script and put down a transmission line and then place the component. The goal is to achieve the high-frequency connections without using signal vias. The continuity and impedance rules take priority over just about everything else.
Analog Routing Includes:
- Awareness of victims and aggressors, keeping them apart.
- Impedance matching
- Reference planes
- Printing circuit elements like couplers and filters on the PCB itself
- Using modules as a shortcut/cost savings
- Considerations for HDI stack-ups
Section nine looks at the above factors plus a tip for estimating the impedance of a given stack-up geometry. We touch on the exotic materials that facilitate good signal integrity and break down the difference between stripline and microstrip transmission lines.
These flex circuits just won’t go away. They are simply too useful as a solution to tight confines and odd connection requirements. We divide flexes into two use cases; flex to assemble where the flex circuit is bent one time and dynamic flex where it is bent many times over its lifespan.
Some flexes replace a cable while others have active circuitry and/or complete the function of an entire wiring harness.
What is Unique About Flex Circuits?
- First and foremost, the materials, the dielectrics, the metals, and the various adhesives and coatings all have to maintain flexibility in all environments.
- Traces have to be more organic with radius turns rather than angular bends
- Vias are generally forbidden in the areas meant to flex. They may require little spurs that tuck under the coverlay to help them adhere to the base material.
- A mesh of copper is more likely to be used than a solid plane.
Section ten starts with the various material differences before going into zero-insertion-force (ZIF) connectors that are peculiar to flex circuits. We look at the unique plating processes and use cases before getting into a few examples of flex and rigid-flex stack-ups.
Spurring off from the bit about rigid-flex, we get to the situation where a number of separate boards are combined to form a system. Instead of a flex joining multiple zones of rigid circuits, we have connectors with cabling or bespoke flexes in between. This approach opens up the possibility of miswiring between the disparate boards. Note that when you have a rigid-flex, all of the rigid zones are going to use the same layers and materials. Multi-board systems allow for the materials to be tailored to each board’s individual requirements.
Types of Multi-Board Systems:
- Motherboard/daughtercard where a small board is attached like a barnacle onto a larger board with a stacking connector.
- A collection of smaller boards attaching in various ways to the main logic card.
- A back-panel that has wall-to-wall connectors where numerous cards are plugged in.
- A wireless network of products such as those found in a smart home.
Section eleven takes a smartwatch as an example to illustrate rigid, flex, rigid-flex, and even a molded board to complete the circuit. Further discussion goes into the telecom sector and finally, a look at a laptop that I consider to be one of my crowning achievements at Google.
Whatever it is, it has to work and the only way to know if it does is to test it. Sometimes, the only possible test is to turn the unit on and see what happens. This functional method is common in consumer goods due to space and costs limitations. The next level is using a boundary scan that has a small number of hooks that are accessed through a JTAG connector. Finally, the In-Circuit Test (ICT) requires access to as many nodes as possible.
A comprehensive test plan should reveal the following:
- Missing components
- Improper component installation
- Solder bridges or other shorts
- Malfunctioning components
Section twelve outlines the test methods and provides some advice on how to implement ICT using telecom equipment as an example. We compare bed-of-nails and flying-head probe fixtures and set priorities in cases where 100% test coverage cannot be achieved.
One of the most important aspects of Design For Assembly (DFA) is the solder mask. Keeping one solder joint from merging with another will always be a good idea. It’s a pretty simple layer to generate if the underlying footprints and pad stacks are in order.
Key Topics Covered Include:
- LPI vs. Dry Film vs. Laser application
- The test method for ensuring solder mask adhesion
- Solder paste deposition including pin-in-paste for mixed technology boards
Drawing on experience in Quality Control, we take a look at what happens in a Receiving Inspection lab when PCBs come into the factory. Another discussion goes into covering vias with solder masks. Lastly, we get into the numbers behind the advanced technique of solder mask-defined lands.
The silkscreen is another simple layer that can get a board held up in the fab-shop’s CAM department if it is not properly addressed. Silkscreen has a hierarchy that prioritizes board level identification and adds levels of component and net identification as space allows.
Typical Silkscreen Requirements:
- Permanent, non-conductive, non-nutrient ink
- Stroke width of 127 to 178 microns depending on application - using laser jet or screen printing methods
- Cleared away from solderable areas and from under components
In section fourteen, we revisit the inspection lab to go over the adhesion test with a vengeance. The vendor’s required marking, including UL certification and date codes, are presented. Next, we discuss alternate methods of marking using metal and mask layers or the application of labels .
We’re getting close to wrapping it up with this dive into the docs. Fabrication and Assembly notes are a primary focus of this section which includes a complete set of each type as an example. Another thrust of this section is the notion of a difference between “what is” vs. “how to” and why we want to avoid methodized drawings.
Items to be Included With a Typical Document Package for a PCB:
- A readme.doc that catalogs the archived files and provides a part/assy number and revision level at minimum.
- An image to define mechanical parameters using dimensions and tolerances.
- A chart depicting hole size, quantity, and tolerance for each via span.
- The stack-up diagram - derived through consultation with the factory.
- Artwork and drill data in an agreed-to format.
Section fifteen suggests that a checklist is appropriate to ensure the completeness of a tape-out. Traceable file names and other formatting are also advised. Fabrication and assembly documents may be kept separate or fused depending on company policy.
This section hammers on the imperative to get in front of the stack-up and resulting line-width/spacing requirements. It’s section one for a reason. It goes on by flipping the script, putting the PCB Designer in the role of the vendor.
Some Takeaways From This Section:
- It is absolutely a team effort to bring forth a PCB/PCBA.
- Living within your vendor's capabilities is easy if you know their limits and sweet spots.
- Every note or figure in a doc package can be a hurdle for those who have to flesh it out.
- When you’re on your own as a designer, you’re doing business almost as much as time as design work.
Section sixteen advises us that we are partners with a wide range of players. Coordinating what are sometimes conflicting requirements takes a little savvy on our part to bring the parties together on a compromise. Be a happy camper or at least keep a good poker face when there is a sudden and late plot twist. It’s not the launch but the landing that matters. Enjoy your day.