Issue link: https://resources.pcb.cadence.com/i/1180282
High Density Interconnect Working with HDI October 2019 9 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. Figure 1-1 Mask Layers For more information, see the Padstack Designer in the Allegro PCB and Package Command Reference and Developing Libraries in your documentation set. Plural Microvias Plural vias are used in high current applications. The plural or Multiple Drill section of the Padstack Editor supports negative clearance entries if you want to overlap the drill hole. Figure 1-2 Example of Multiple Microvias