Issue link: https://resources.pcb.cadence.com/i/1180282
High Density Interconnect Working with HDI October 2019 22 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. Dynamic Unused Pad Suppression Dynamic Unused Inner Layer Pad Suppression moves what has been historically a post- processing application to reduce capacitance effects at each hole site into the design database. Typically the fabricator's CAM department handled this application prior to film generation, and possibly the OEM removed the pads as a function of artwork generation. With the ever-increasing demand to make product smaller, lighter and cheaper, unused inner layer pads are being removed not only for electrical but also for physical effects. Removing pads increases higher routing densities by allowing traces to be closer to the hole edge. High-temperature, lead-free soldering requires that pads be left on unconnected thru pins, but not on unconnected vias. This application is not only object-based (pin versus via), but also layer based to retain the pads on thru pins on the signal layers closest to the surface layers. User Interface Unused Pads Suppression is available by choosing Setup – Cross Section (xsection command). Each layer of the stack-up is represented; conductor in yellow, planes in red. Settings for pins and vias can be enabled on a per- layer basis. Right-click and choose Enable All Layers to enable all layers under either the Pin or Via category. Enabling the Dynamic Unused Pads Suppression option automatically enables the display of padless holes. Layer Restrictions Layers unavailable for pad suppression include the Top and Bottom, negative planes, and the beginning and ending layers of a blind and buried via. Outer and plane layers display for reference only. Other Restrictions ■ Pads associated with mechanical pins are not eligible for removal. ■ The pad definition must have the Allow Suppression of Unconnected Internal Pads option enabled to make a pad eligible for removal.