High Density Interconnect
Working with HDI
October 2019 21 Product Version 17.4-2019
© 1999-2019 All Rights Reserved.
Figure 1-11 Acute Angle at Junction
The algorithm determines the line width based on the smaller of the two vias. Available
options let you waive impedance or maximum line width DRCs that may result. Run this utility
near the end of the design process, as it's not possible to reset line width.
For more information, see Route – Line Fattening (line fattening command) in the
Allegro PCB and Package Command Reference.
Elimination of Unused Blind and Buried Vias in a Stack
Often, vias in a stack may become orphaned due to changes made during routing or clip-
boarding. The end result leaves unwanted vias that occupy valuable routing real-estate and
also contribute to stub effects on the signal. Use either of the following:
■ Delete_hdiviastubs environment variable in the Early Adopter category of User
Preferences, available by choosing Setup – User Preferences (enved
command).
■ Eliminate Unused Stacked Vias option in the Via Eliminate application of the
Glossing Controller, available by choosing Route – Gloss – Parameters (gloss
param command).
Unused Blind and Buried Via Report
The Unused Blind/Buried Via Report detects unused buried or blind vias in a stack.
Removing these vias can open routing real estate and reduce stub effects at the via site.
Run the report by using Tools – Reports (reports command).