High Density Interconnect
Working with HDI
October 2019 17 Product Version 17.4-2019
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Figure 1-9 Via at SMD Fit Off
Via at SMD Thru detects placement of thru-hole vias within the SMD pad boundary.
For more information, see the SMD Pin Data Sheets in the Allegro Platform Constraints
Reference.
Via in Pad DRC Mode Settings
Mode settings for Via-in-Pad constraints appear in Constraint Manager – Analyze –
Analysis Modes – SMD Pin Modes. The constraints align with the names used in Allegro
PCB Router.
■ Via at SMD Pin: On activates the Via-in-Pad DRC Check
■ Via at SMD fit: On indicates the via pad must be contained within SMD pad
■ Via at SMD fit: Off indicates the center of via cannot extend beyond the pad edge
■ Via at SMD thru: On indicates tat Thru vias are allowed in SMD pads
■ Via at SMD thru: Off indicates that Thru vias not allowed in SMD pads
