Issue link: https://resources.pcb.cadence.com/i/1180282
High Density Interconnect Working with HDI October 2019 16 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. Component Fanout The Allegro PCB Editor offers several interactive and automatic controls for component fanout, a process also known as pin escaping. The options include: ■ Fanout By Pick, which invokes Allegro PCB Router ■ Use of .do files to be used with Allegro PCB Router ■ Interactively add/copy within Allegro PCB Editor ■ Build fanouts into library symbols ■ Interactive fanout commands, including via structures for HDI Via-in-Pad DRC Suite Running at the design level, Via-in-Pad DRC ensures that vias are placed properly within SMD pads. Properties can be used to override these checks at the symbol level. Via at SMD - Fit On targets metal-defined pad applications where vias must be totally contained within the boundary of the SMD pad. A DRC occurs if the via pad protrudes outside the SMD pad. The examples below show legal via-in-pad placement. Figure 1-8 Via at SMD Fit On Via at SMD - Fit Off targets soldermask-defined pads where a via is allowed to float outside the edge of an SMD pad up to the point where the via center remains inside the SMD pad. Floating the via center beyond the pad edge results in acid trap formations. Other applications for this check might include vias placed in narrow SMD pads, ones typically associated with quad flatpack devices.