Avoiding PCB Layout Errors With the Right Design Tools

April 26, 2021 Cadence PCB Solutions

Key Takeaways

  • Avoiding PCB layout errors in design preparation.

  • Avoiding PCB layout errors in component placement.

  • Avoiding PCB layout errors in trace routing.

Closeup of a circuit board

A tightly placed and routed circuit board that can’t afford any PCB layout errors

Printed circuit board layout is an intricate and challenging task—and don’t let anyone tell you otherwise. The circuitry has to be structured according to strict rules to operate at peak performance, while at the same time another set of design rules has to be obeyed for manufacturability. Even small and “easy” layouts can present unique design challenges and PCB layout engineers have to be armed with the latest tools to complete the job.

Printed circuit board design CAD tools are a marvel of software engineering. They are loaded with many different features and functions that enable layout designers to get the job done. These range from utilities to initially set up the design for layout to advanced trace routing engines to complete all of the net connections from the schematic. To best leverage these tools, designers must understand all of the nuances of PCB layout, especially those that if not done correctly can cause problems. Here are some common PCB layout errors that designers should be aware of.

Prepping Your Design: Are you Ready for PCB Layout?

When a new design is ready for layout, it is natural to want to jump into it and start placing components and routing traces. The problem with that is that usually there is a lot of preparation work that needs to be done before the layout should begin. Many designers fall into the trap of thinking, “I’ll deal with it later,” only to find out that they now have larger problems to correct that could have been avoided with better preparation. Here are some of those common issues that if dealt with upfront, can save you from a lot of trouble later.

  • Outdated or incorrect components: It is not unusual for schematics to have problems with their components. If they have copied circuitry from an older design, the libraries are not up-to-date, or a favorite part that is actually obsolete was used, the end result will be the same. The components may not be available for manufacturing, resulting in a necessary redesign to update the parts. Scrubbing the BOM for errors like this or using parts from a library service can resolve this problem.

  • Faulty design synchronization: Sometimes design work will begin even though the schematic database is not fully synchronized with the layout. There are many compelling reasons for this, with saving time being at the top of the list, but it often doesn’t turn out well. Having to correct synchronization problems later could result in portions of the completed circuitry being ripped up. The lesson here is to take the time to make it right before you invest too much time in layout.

  • Board layer stackup configuration: Designers have been known to start laying out a board before the layer stackup is finalized. Once again, this is usually done as a time-saver, but these good intentions can backfire spectacularly. Moving layers around in the CAD system after the layout has started can take time and potentially introduce design errors. However, the bigger concern is if moving completed routing from one layer to another will affect the overall signal integrity of the board. You may find yourself having to redesign some major portions of your circuitry to correct these problems.

  • Design parameters: Not fully setting up your PCB design CAD system before layout starts won’t necessarily introduce a design error, but it could potentially slow you down. Colors, grids, and many other parameters are designed to create a work environment that helps productivity, and you are only hurting yourself if these aren’t configured before you start. Many of these settings can be transferred in templates or readme files, which can be very helpful when beginning a new design.

The color dialog menu in Cadence’s Allegro PCB Editor

The menu for setting up color parameters in a PCB design CAD system

At this point, the board is ready for the layout to start. Next, we’ll look at some of the common errors that can happen during component placement.

PCB Layout Errors While Placing Components

Let’s face it, while it may be complex, PCB layout is also a lot of fun. Maneuvering components around on the screen with their net connections rubber-banding between them is one of the best and most challenging puzzles that you can work on. However, as with the setup of the board prior to placement, there are some potential problems here that can cause your design a lot of issues if you aren’t careful about preventing them. Let’s start first with potential issues involving the physical footprints that you will be placing on the board.

  • Incorrect footprints: We’ve already talked about the importance of having the correct components in your design, but you can still have a problem if those components aren’t using the right footprints. Although this should technically be caught during design synchronization, designers should still ensure that they are using the correct footprints. Whether a PQFP is being used instead of a BGA, or the polarity of a capacitor is reversed, footprint errors like these will require a redesign if not caught the first time around.

  • Don’t neglect the floorplan: To ensure good signal and power integrity, PCB design circuitry must be carefully partitioned for maximum performance. This is especially true of high-density designs where every millimeter of space counts. Designers who fail to do this may have costly redesigns ahead of them to improve the performance of the board. Using the schematic to place logical groups of components or designating placement rooms on the board can be very helpful in preventing partitioning errors.

  • DFM is essential: Ensuring the manufacturability of a circuit board is just as important as signal and power integrity in the design. It is critical that PCB designers obey design for manufacturability (DFM) rules in their layout. These include minimum clearances around components for automated assembly equipment and test equipment, as well as room for technicians to debug and rework the board. Using the design rules and constraints in the CAD tools is an absolute must for eliminating DFM errors.

  • Remember to design the PDN: While laying out the board for good signal integrity is essential, it is just as important to focus on the power delivery network (PDN) as well. It can be easy for designers to relax their diligence when it comes to laying out power supply components and thereby introducing noise and other interference into the design. Make sure to follow good PDN design guidelines and use the power integrity tools of your CAD system to check for errors.

At long last, the board is finally ready to route the traces, but don’t let your guard down. There are still ways that errors can creep into a design if you aren’t careful.

Some Common Trace Routing Errors

Cadence’s Constraint Manager being used to set up routing vias for specific nets

Using the design constraints (as shown here) can allow you to set up the correct rules for your routing

Routing traces on a printed circuit board layout is a very rewarding task. As each routed trace is completed, its corresponding net connection guide is eliminated—bringing you one step closer to finishing the job. It is also very easy for design errors to creep in that can undermine what you are trying to accomplish, so designers must stay vigilant. Here are some examples to keep an eye out for.

  • Escape routing: Surface mount devices need traces routed out of their pads into vias for interconnecting on other layers of the board. This is known as escape routing, or via fanout routing, and is fairly straightforward with most SMT devices. High pin-count devices with fine pitch present more of a challenge, however, and designers must take care not to block routing channels on internal layers with their escape vias. Often, chip manufacturers will post recommended routing solutions in their product datasheets, which can help you to avoid routing congestion.

  • Constraint management: With all of the different requirements in circuit board design today, it is imperative that layout designers use the full extent of their design constraint management systems. These utilities allow nets or groups of nets to be configured with the necessary trace widths and spacing as well as assigning clearance rules to components. They can go even further, with setups for high-speed design topologies, via types, and electrical timing parameters, among others. In the picture above, you can see some of the settings available in a design constraint management system to prevent routing rule violations.

  • Not enough routing room: When routing circuit boards with dense routing patterns, it is important to plan out in advance where the routing needs to go. This will ensure that there is enough room for high-density patterns that are common with double data rate (DDR) routing. Without this planning, you may find yourself replacing and rerouting large portions of the board. Many CAD tools, like Cadence’s Allegro PCB Editor, provide routing modes that can help with floor planning tasks like this.

  • Lack of reference planes: As signal speeds increase in circuit board designs, it is essential that PCBs are laid out with adequate reference planes. Without these planes, high-speed transmission lines and other sensitive nets may not have a clear signal return path. The returning signals will instead wander around the board, interfering with other signals and creating noise and EMI that will ruin the signal integrity of the design. These kinds of errors can be disastrous, as the board will require a redesign to bring its noise under control.

As we said in the beginning, PCB layout can be a complex task, especially with all of these potential errors lurking in the shadows. Thankfully, many of these concerns can be mitigated by using the power of your PCB design CAD tools.

The Solution Is in the Tools

Routing options in the Allegro PCB Editor

There are many different routing options available to PCB designers in Cadence’s Allegro PCB Editor

We’ve been highlighting different aspects of PCB design tools that can help with many of these problems along the way, but here we will put the spotlight on two of them:

  • Constraint management: As we’ve covered earlier, the design rules and constraints that are set up in a PCB design can keep the designer from creating unintended errors. Constraint management systems will allow you to control everything from component clearances to silkscreen on vias. For example, you can create specific zones where the trace widths are changed. This can be very beneficial when routing out of high-density components like fine-pitch BGAs.

  • Advanced routing tools: PCB design systems, like Cadence’s Allegro PCB Editor, give you many different options when it comes to routing tools. As you can see in the picture above, there are many different choices available. You can escape route, route individual nets, auto-interactively route, and batch route all within the same design system. This can not only help protect you from routing errors, but it will increase your productivity as well.

Allegro has many other features that can help you to avoid PCB layout errors, including library utilities, simulators and analysis tools, and a full schematic package. To read more about PCB layouts, take a look at what Cadence has published in this E-book.

If you’re looking to learn more about how Cadence has the solution for you, talk to us and our team of experts

About the Author

Cadence PCB solutions is a complete front to back design tool to enable fast and efficient product creation. Cadence enables users accurately shorten design cycles to hand off to manufacturing through modern, IPC-2581 industry standard.

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