Issue link: https://resources.pcb.cadence.com/i/1532922
The Constraint Manager will want all other nets within that match group to be within a certain difference (we call it Delta: Tolerance) in length from that target net's length. Meaning that if DDR_DQ2 were suddenly 70 mils long, then all other traces from DDR_DQ0 and DDR_DDR3 to DDR_DQ7 must be 70 mils (1.778 mm) long within a 0 mm difference, and a tolerance of arriving 5% within that length is acceptable for skew for our application. Important Note: Please note that all values are unique to each specific use case. Return path management Define allowed return paths underneath signal traces to maintain signal integrity and minimize EMI. A continuous, low-im- pedance return path is crucial for high-frequency signals. Consider using solid ground planes and avoiding splits or gaps in the return path. For our application, we set the Reference Net to 0, which is our 'Ground' reference (we set layer 2 off as the ground plane). We then set Reference Layer(s) to the plane that aligns with the behavior of the signals and/or routing of said signals. To keep things simple we select Closest Plane. Just note that if you route your traces on say, the bottom layer (layer 6), and the closest plane happens to be layer 5 of 6, then your signal return path may flow along layer 5 instead of layer 2 (the layer that holds the net 0 that we used as the reference net in the previous cell). With that likely being a voltage difference from the 0 net ground plane, then noise and unwanted EMI may occur. If that is not acceptable, consider using the Table… option from the dropdown menu shown below to choose specific planes. 55 www.cadence.com OrCAD X Constraint Management Guide