Issue link: https://resources.pcb.cadence.com/i/1532922
Applying High-Speed and Advanced Constraints The following constraints can be applied to complex and/or high-speed PCBs (please refer to the previous sections of this document to learn more about implementing those constraints). Advanced Constraints Application Advanced Electrical Constraints Wiring topology Set specific routing paths for technologies like DDR3 and T-branch to minimize signal attenuation due to PCB material properties. Or Daisy Chain or star topologies. Image: Diagram showing the prioritized routing of critical nets on a PCB. Definition: Wiring topology involves organizing the connections between different nets on a PCB to achieve a certain outcome, such as minimizing signal reflections, signal attenuation or voltage drops. Example: Let's ensure that a pulse-width modulated net follows a daisy-chain topology. Steps: 1. Open the Constraint Manager, then go to the Electrical > Routing > Wiring worksheet. 2. In the Type column, you can right click your Dsn cell, create a new Electrical Constraint Set (ECS). Notice in the image below, an ECSet has already been created. 3. Select the drop-down in the Schedule column and choose your net topology. You have options such as: f Minimum Spanning Tree f Daisy-chain f Source-load Daisy-chain f Star f Far-end Cluster f (Clear) 37 www.cadence.com OrCAD X Constraint Management Guide