Issue link: https://resources.pcb.cadence.com/i/1532922
All Constraints for Analysis The Constraint Manager can analyze most potential bottlenecks for a printed circuit board and apply constraints accordingly. To find out the kinds of constraints we can enforce on our PCB, have the Constraint Manager open. Standard Electrical Constraints In this section we can control the following: f Wiring f Vias f Impedance f Min/Max propagation delays f Total Etch Length f Differential Pair f Relative Propagation Delay f Return Path Standard Physical Constraints In this section we control the following: f Referenced Physical CSet f Line Width (Min, Max) f Neck (Min Width, Max Length) f Differential Pair (Min Line Spacing, Primary Gap, Neck Gap, (+)Tolerance, (-)Tolerance f Vias f BB Via Stagger (Min, Max) f Allow (Pad-Pad Connect, Etch, Ts) Then under the Net workbook folder named All Layers we have even more options: f Line Width (Min Max) f Neck (Min Width, Max Length) f Uncoupled Length (Gather Control Max) f Static Phase Tolerance f Dynamic Phase (Max Length, Tolerance) f Differential Pair (Referenced Intra-DP Spacing CSet, Min Line Spacing, Primary Gap, Neck Gap, (+)Tolerance, (-)Tolerance) f Vias f BB Via Stagger (Min, Max) f Allow (Pad-Pad Connect, Etch, Ts) 29 www.cadence.com OrCAD X Constraint Management Guide