Noise from Parasitics in Switching Regulator Circuits
All PCB layouts have parasitics, but these elements won’t always create major problems for your circuits. In some circuits, they can be very troublesome and will require some additional circuitry to prevent noise problems that are created by parasitics. One perfect example is switching regulator circuits, which have important parasitics to consider in the components and in the PCB layout. Parasitics are prominent in the following areas of the PCB layout for a switching regulator:
- Inductance and capacitance in the terminals and body of switching MOSFETs
- Loop inductance in feedback loops and the high dI/dt loops (both input and output)
- Mutual capacitance between the switching node and other conductors in the PCB layout
We’ll look at some circuit design and layout strategies you can use to control noise problems originating from these parasitics.
Problems From Parasitics in Switching Regulator Circuits
If you compare a switching regulator circuit diagram with a PCB layout for these devices, it’s easy to see where parasitics can exist in the PCB layout. In these designs, parasitic capacitance and inductance can create the noise problems listed above, but a few simple design strategies can help suppress these noise problems. In the forthcoming examples, we will use the following buck converter circuit to illustrate these principles, although the same ideas apply to other topologies.
Standard buck converter topology we will use as an example in this article.
Design an Output Filter
One way to reduce switching noise is to place a filter circuit on the output. This is normally an LC circuit that is cascaded off the output as shown below. In this example, the capacitors will have some effective series resistance (ESR), which is usually much less than 1 Ω.
Buck converter output filter example.
The challenge with this design is the need to ensure the new filter elements do not add an additional pole to the circuit’s transfer function, which would lead to an underdamped oscillation (ringing) in the time domain. The easiest way to dampen any transient response is to use a larger capacitor and to place a small resistor (only a few Ω) in series with the capacitors. Some experimentation and simulation is needed here to ensure there are no excessive transient oscillations and to ensure that the switching noise is appropriately suppressed.
Design the Switching Node Properly
Make sure to estimate the capacitance at the switching node to ensure the capacitance is not too high compared to your high-side and low-side MOSFET capacitances. As a general rule, the switching node has to be large enough to handle the required current, but small enough to have low capacitance. If the switching node capacitance is too large, it may need to be sized smaller so that you can ensure current flow is confined to the switching MOSFET rather than coupling through the parasitic capacitance.
Switching load capacitance vs. low-side MOSFET capacitance.
Thankfully, the switching node capacitance is usually very small compared to the low-side MOSFET capacitance shown in the example buck converter above.
- Switching node capacitance: about 24 pF/sq. mm, assuming the substrate Dk = 4, thickness = 0.1 mm, and fringing factor of 4
- MOSFET D-S capacitance: on the order of 1-10 nF
This means that, for a physically large MOSFET with high capacitance, the switching node would need to be at least 40 sq. mm to allow noise to bypass the low-side MOSFET and reach the ground net. Therefore, we can usually ignore the switching node capacitance to GND.
What’s more important is the mutual capacitance to other circuits, which allows noise coupling at high dV/dt swings. Bringing ground closer to the switching node helps reduce this mutual capacitance.
When we refer to an RC snubber in terms of switching regulators, this is being placed across the low-side MOSFET as shown below.
RC snubber placement in a switching regulator circuit.
If the RC leg has high enough impedance (usually a few Ω at the MOSFET’s natural frequency), then the MOSFET’s transient response from switching can be damped. The design and simulation of this RC leg requires an accurate circuit model for the MOSFET, which must include parasitics in order to calculate and simulate properly.
As always, when implementing a solution to deal with parasitics in a PCB layout or circuit design, make sure to simulate your ideas. In this case, the required simulations include transient analysis and frequency sweeps to evaluate how the additional circuit sections will interact with your switching regulator circuit. In summary, these PCB design and layout recommendations can help you suppress noise in power regulator circuits:
- Bring ground closer to the switching node
- Use a smaller switching node
- Use an RC snubber circuit if MOSFET ringing is too large
- Use an output filter with critically damped response to reduce switching noise without creating a new transient ringing problem
When you need to design and simulate your switching regulator circuits and qualify the effects of parasitic capacitance, the industry’s best circuit design and simulation tools in PSpice from Cadence. PSpice users can access a powerful SPICE simulator as well as specialty design capabilities like model creation, graphing and analysis tools, and much more.
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