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How To Remove Parasitic Capacitance in High-Speed Designs

Key Takeaways

  • Understand what is parasitic capacitance.

  • Learn how parasitic capacitance affects electronic circuits.

  • Explore ways to remove parasitic capacitance.

When you think of parasites, you might think of the biological definition--an organism that lives on or in a host organism, leeching onto the host of its food. In this sense, parasites can be large nuisances or cause serious health problems.

Of course, as a PCB designer, you likely know of another type of parasite--parasitic capacitance. While you don’t have to worry about the biological parasites inside of a circuit, understanding how to remove parasitic capacitance can help improve the integrity of your signal and performance in PCB designs. 

What Is Parasitic Capacitance?

Parasitic capacitance is a phenomenon in which elements in a circuit behave like a capacitor when they are not physically a capacitor. It is easier to comprehend the idea of parasitic capacitance if you revisit the basics of a capacitor. 

A capacitor is made up of two conductive elements separated by an insulating material. When both conductors are driven by a differential potential, charges build up across them. The charge that builds up is expressed in capacitance by the formula C = q/V. 

Physical capacitors are constructed on the above-mentioned principle to intentionally create storage of electric charge in a circuit. However, capacitance may also exist between elements of a circuit, so long as the elements are within the required distance to form a charge between them. 

The unintended capacitance formed in a circuit is known as parasitic capacitance. Parasitic capacitance can develop between two conductors, pads, a conductor and an adjacent ground plane, or any two elements that fulfill the criteria to build up charges. The probability of parasitic capacitance is greatest when parts of a circuit are near to each other and of two different voltage levels.

Parasitic capacitance defined by area and distance of conductors.

Parasitic capacitance between conductors is a relationship of area and distance. 

The above diagram shows how capacitance could develop between two conductors in a circuit. When conductors are placed on a different potential level, the charge built up is determined by the following equation:

C= (Ɛ×a) /d, where Ɛ is the permittivity of the insulator between the conductors. 

How Does Parasitic Capacitance Affect Circuits?

Parasitic-capacitance is problematic at high-frequency.

At high frequency, parasite capacitance results in short-circuits.

Parasitic capacitance is likely to be present in a circuit, and for low-frequency designs, it is unlikely to cause any major issues. However, parasitic capacitance can be a major problem when in a high-speed design.

As the frequency increases, the behavior of the capacitor changes, and it eventually acts as a short circuit. You can expect the same from parasitic capacitance when high-speed signals are running through one of the elements. 

In an amplifier design, parasitic capacitance that forms between the input and output can result in unwanted feedback. The usually open-circuit path becomes conductive when operating at high frequency and causes undesirable oscillation or parasitic oscillation in the amplifier circuit.

Parasitic capacitance can be troublesome for two adjacent conductors. When one of the conductors carries a high-frequency signal, it can introduce crosstalk to the other conductor. Higher parasitic capacitance leads to higher EMI noise.

Not only does parasitic capacitance create interference, but it can also affect the integrity of the signal itself. For example, parasitic capacitance can build up between a conductor and the ground plane. At high frequency, both elements behave toward a short circuit and will alter the signal on the conductor. 

How to Remove Parasitic Capacitance

Parasitic capacitance reduction with inner-layer ground plane removal.

Removing the inner-layer ground plane helps reduce parasitic capacitance.

Given how circuit density continues to increase in many PCB designs, it’s impossible to remove parasitic capacitance. You can, however, reduce its effects by applying these strategies.

1. Increase clearance between conductors

If possible, allow for a higher clearance between traces in the design. Capacitance is inversely proportional to the distance between conductors. A larger clearance will reduce parasitic capacitance and effects like cross-coupling.

2. Use ground plane appropriately

While an inner-layer ground plane is recommended for reducing stray inductance, EMI, and heat dissipation, keep in mind that it could also increase the parasitic capacitance. Consider the pros and cons before covering the entire inner-layer with a ground plane.

3.  Reduce vias

Vias are useful when building a compact PCB, but having too many of them can introduce significant parasitic capacitance. Use vias sparingly, and try to avoid any on high-speed traces. 

Low-parasitic capacitance design is easier with the right PCB software. OrCAD PCB designer allows you to set design rules and tools to keep parasitic capacitance at bay in high-end circuit board design. You can also use InspectAR to accurately assess and improve PCBs using augmented reality and intuitive interaction. Inspecting, debugging, reworking, and assembling PCBs has never been faster or easier.

If you’re looking to learn more about how Cadence has the solution for you, talk to us and our team of experts