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PCB Design Guidelines for High-Speed Circuit Board Layout

Key Takeaways

  • Preparing for high-speed PCB layout

  • Component placement and PDN development of a high-speed design

  • Some helpful PCB high-speed routing recommendations

PCB design guidelines for high-speed layouts govern this board’s trace routing and tuning

The dense routing of a high-speed circuit board

Digital circuitry is getting faster in order to supply the needs of today’s electronics. High-speed design used to fall into a narrow group of electronic products, but today, most products will at least have a portion of the design that can be considered “high-speed.” These designs require PCB designers to lay out their circuit boards according to high-speed rules and requirements, which is still new territory for some. To help, we have compiled some of the most common PCB design guidelines for high-speed that you can apply to your next circuit board layout.

Setup for High-Speed Design

Before the layout can start, there are a lot of design and database details that need to be taken care of first.


While there is a lot to set up before you can begin the layout of a high-speed design, most people don’t give too much thought to the schematic. Designers should verify the parts, simulate the circuitry, and complete the design. But is the schematic itself ready to be used for layout? An unorganized schematic can create difficulty for PCB layout if the designer can’t easily understand the intent of the circuitry. High-speed signal paths, for instance, need to be laid out sequentially so that the designer can emulate their component placement in the layout.  It is also helpful to mark areas of the design that you want the layout team to understand clearly. These include:

  • Critical placement locations and which side of the board certain parts may be required on.
  • Keepout zones around critical components.
  • High-speed routing information including routing topologies, measured lengths, and matched lengths.
  • Differential pair and controlled impedance information.

PCB Libraries

The component footprints used for high-speed design must be checked and verified as with any PCB layout, but some additional library work may be involved. For instance, some footprints used in high-frequency or RF designs may require alterations to reduce pad sizes for signal integrity. Additionally, some footprints may be reduced to their minimum sizes to accommodate high-density design requirements. As always, though, component footprints should follow industry and manufacturer specifications as much as possible to comply with design for manufacturability (DFM) requirements. Many design tools, such as Cadence’s Allegro PCB Editor, offer online library browsing capabilities to pull in vendor-specific footprint models.

Materials and Components

The materials used to build your high-speed circuit board must be selected before you start the layout. Harsh operating environments may require a more robust board structure and the physical characteristics of the materials will be needed for controlled impedance routing calculations:

  • Work with your manufacturer to see if your board will need high-speed materials.
  • Enhanced epoxy or PTFE materials might be a better choice for high-speed and high-frequency applications.
  • The dielectric constants of FR-4 may be unable to hold the impedance values you need or the design may experience greater signal loss than is acceptable.

The PCB components will also need to be reviewed and confirmed by the manufacturer. With today’s supply chain problems, you will want to ensure you have parts available before committing to a design.

Board Layer Stackup

High-speed designs require specific board layer stackups to help with EMI shielding and signal integrity. The primary consideration is to include a full and continuous ground plane on an internal layer. Many boards will also have multiple ground plane layers throughout the board stackup for multiple layers of transmission line routing in microstrip or stripline configurations. The board layer stackup will need to be built into the PCB CAD database or imported from an external source. Here is where the ability of PCB design systems to communicate directly with the vendor for exchange stackup information, as shown in the video above, can be so helpful.

Design Rules

PCB design systems typically have a very comprehensive set of design rules and constraints that can be set up for the design. Standard circuit board designs will already be using component and net classes to specify spacing rules, trace widths, vias, and other constraints. With a high-speed design, a whole new set of rules should be set up for use, including:

  • Differential pairs
  • Signal paths
  • Routing topologies
  • Measured and matched trace lengths
  • Trace tuning parameters

These rules can be set up for each design, or in many cases, imported from another layout to ease the designer’s workload.

System Parameters

Last of the setups, but certainly not least, are the parameters. These include display parameters like colors and fill patterns, grids, routing preferences, and a host of others. By managing these parameters, designers can improve their efficiency while using the tools.

Now that we’ve got the high-speed design set up, let’s start laying the board out.

The color dialog menu in Cadence’s Allegro PCB Editor

A PCB CAD system’s parameter setup menu for design colors

PCB Design Guidelines for High-Speed Component Placement

Component placement of a high-speed design still needs to follow the same guidelines as the placement of a standard design. The parts should be distributed evenly around the board for balance, and design for manufacturing and test rules (DFM & DFT) need to be followed. This includes component spacing to other parts, board features, and the edge of the board. Components that run hot should be centralized to leverage as much board area as possible for cooling, and care must be taken not to block the flow of air across the board. Connectors and other human interface parts should be placed where technicians can easily access them, and different power supplies should be spread out from each other.

Where high-speed design differs is the need for creating the best signal integrity throughout the design. A major portion of signal integrity is dependent on designing the board for clear signal return paths on the ground plane and the separation of digital and analog circuitry. Therefore, in addition to placing the components to support the trace routing that they will need, it is important for designers also to place their parts for clear signal returns and circuitry isolation. It is often best to floorplan the placement before arranging the actual parts on the board to accomplish intricate component placement like this. Floorplanning will allow you to work out the functional partitioning of the circuitry without having to move parts around constantly.

With the partitions developed, it’s time to start placing the components. Here are some high-speed placement guidelines that can help:

  • Maintain room for clear signal return paths on the reference planes.
  • Allow routing channel spacing for dense data and memory bus routing.
  • Avoid placing parts where analog and digital will have to wander through each other’s areas.
  • Position parts to keep high-speed signal paths short.
  • Signal paths can include multiple components inline of the path. Lay these parts out according to their arrangement in the schematic.
  • Analog parts should also be placed as closely together as possible to reduce their trace lengths.

As we’ve already said, the PDN should be developed along with the component placement. Next, we’ll take a look at some PDN design recommendations.

A 3D view of component placement and routing on a high-speed design

Analog and power component placement

Developing the Power Delivery Network of the Design

The careful design of a PDN in a high-speed circuit board is essential to the board’s ultimate electrical performance. Without a clear return path for the signals, the board may end up creating a lot of noise that can potentially create false signaling and disrupt the normal operation of the circuits. It can also lead to other signal integrity problems such as EMI and ground bounce. Those signal returns that can’t find a clear return path on the reference plane may end up coupling to any return path they can find, including other traces. This unintentional coupling will create common mode energy, which could radiate out and generate additional noise. To avoid these problems, here are some PDN design recommendations to help.

Use One Continuous Ground Plane and Do Not Split It

  • Use your placement partitioning to separate digital and analog circuitry instead of splitting the plane.
  • When routing high-speed transmission lines, ensure they have a clear signal return path on the adjacent ground plane. The return paths will naturally form around the traces at higher speeds and frequencies, making them easy to plan for.

Be Careful of Circuit Board Features That Can Block the Ground Plane

  • Too many vias in a concentrated area, board cut-outs, or other obstacles can break up the clear return path on the reference plane.
  • Avoid routing high-speed transmission lines where there are voids in the adjacent ground plane.

Large Pin-Count High-Density Components With Multiple Power Connections

  • Processors, memory, and other large pin-count high-density components will have many power pins to supply their enormous power needs.
  • Each of these connections will need a bypass capacitor placed as close as possible to the supply pin for the best power filtering.

With the board placed in the optimum configuration for the net connections and the PDN, you can begin routing the traces.

 Circuit board routing shown in 3D in Cadence’s Allegro PCB Editor

Some high-speed routing showing tuned traces

High-Speed Trace Routing Techniques

With a good arrangement of the components on the board already in place, your design will have a basic template of how the routing should be laid out. However, it is important to note that you will likely still be moving parts around to refine and fine-tune the routing as you would with any PCB design. Here are some PCB design guidelines for high-speed routing that can help:

  • Make sure to fully engage the design rules and constraints for line lengths, matched lengths, widths, spacing, layers, impedance-controlled routing parameters, differential pairs, trace tuning, and vias assignments.
  • Set up any necessary area rules and keep out zones as required for unique routing needs.
  • Keep routing as short and as direct as possible, except for specific routing topologies and measured lengths.
  • Do NOT route over voids or breaks in the ground plane. You will risk ruining the signal’s clear return path and potentially creating the signal integrity problems discussed earlier.
  • As you route high-speed signals, make sure they have a clear signal return path on the adjacent ground plane.
  • Give sensitive signals, such as clock lines and differential pairs, additional clearance from other routing. Three times the standard trace width is often a good rule of thumb.
  • Be sure to route high-speed transmission lines on the layers they are assigned to for their return paths on the adjacent reference plane.
  • Avoid changing layers with high-speed transmission lines, but if you do, try to keep them adjacent to the same ground plane for their signal return paths. If the layer transition is further than those layer pairs, use a ground via next to the signal via for the return path to transition with.
  • Be cautious of high-speed transmission lines running in parallel with each other, as they may create crosstalk.
  • Also, beware of broadside crosstalk vertically between layers, which may have less spacing than two traces side-by-side on the same layer.
  • Use wider traces for analog routing.
  • Plan your via escapes for the greatest amount of routing channels by selecting a wide grid for their placement.
  • Minimize the use of vias as much as possible to reduce inductance, or use blind, buried, or microvias.
  • Be careful with dense areas of escape vias that you don’t block the return paths on the ground plane.

There are more PCB design guidelines for high-speed than what is listed here, but this article should give you a good start on your next high-speed PCB design project. Also, remember to use the capabilities of your CAD tools to their fullest. In addition to the design rules and constraints that we’ve already talked about, PCB design tools have many other features that can help you. For instance, Cadence tools have different circuit simulation and design analysis tools available for engineers to find and correct design problems before a board is built. 

For more information on high-speed design, take a look at this E-book from Cadence. If you’re looking to learn more about how Cadence has the solution for you, talk to our team of experts.