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PLL or Phase Locked Loops in Wireless Communication Technologies

Wireless module with rubber ducky antenna for pll or phase locked loops


Unless you work with wireless systems professionally, you wouldn’t know that the WiFi signal allowing you to read this article is generated and processed using a series of deceptively simple circuits. Demodulating a wireless signal and extracting the data it carries uses a deceptively simple circuit called a phase locked loop (PLL). This circuit finds its home in a number of other applications including computer peripherals, electro-optics, and wireless systems.

Among their many useful applications, PLLs most important functions in a wireless system are demodulation, clock recovery/deskewing, and spectrum spreading. When you need to extract digital data from a frequency modulated signal and keep this data synchronized with the rest of the data throughout your system, look no further than a PLL.

Phase Locked Loop Applications

First a bit of background: A PLL uses negative feedback from a voltage controlled oscillator (VCO) to ensure that the VCO output remains synchronized with some other reference signal. In a wireless system, phase noise in the receiver signal can increase bit error rates in the demodulated signal and cause this signal to fall out of sync with the system clock.

Using a PLL cleans up this phase noise, removes jitter, and can be used to compensate for skew (with parallel data) or synchronize with an external clock (with serial data). In high-speed systems or PCB design, propagation delay can cause desynchronization between digital signals in different portions of the signal, even if the phase of each signal is initially locked to the system clock.

Frequency Synthesis for Wireless Communications

Using a VCO as part of a PLL is a better choice than using standalone VCO for frequency synthesis. A standalone VCO used for frequency synthesis can accumulate drift in the phase of the output signal over long periods. A standalone VCO can also include spurious sidebands in the output frequency spectrum.

A PLL contains a VCO and uses the output from the VCO in a negative feedback loop to improve stability in the VCO output. Using a filter can remove the sidebands, but it does nothing to solve drift. Both of these problems can be solved by using an N-integer or fractional PLL and locking onto an external reference frequency with higher stability.

The output from the VCO in the PLL will be some multiple of the reference signal and will have narrower bandwidth compared to the VCO on its own. This is particularly important if you need to generate a fast series of clock pulses for high data rate wireless systems or computer peripherals, or if you need to synthesize send a modulated high frequency signal to a transmitter.

Clock circuit illustration

Encourage your frequency to be as stable as necessary with proper design considerations

A PLL also has a role to play in the transmitting section for an RF system. The reference signal (i.e., the carrier) is normally sent to a synthesizer that uses data from a bus to modulate the signal. The output from the synthesizer is then sent into the loop filter section. Finally, the analog output from the VCO in your PLL will be sent directly to the transmitting antenna. One simple implementation is to use a T-section with three resistors to match the impedance to 50 Ohms.

Layout Tips for Your Wireless System

Implementing the right layout for a PLL in your PCB depends on the type of PLL you use in your circuit board. There are digital and analog PLL circuits that are available for different applications. However, analog PLLs come in two varieties. An analog PLL may actually use digital circuitry in its phase detector. For example, some analog phase detectors use XOR gates or flip-flops. A note on terminology: some companies call these devices digital PLLs, even though they operate on analog frequencies. Meanwhile, PLLs that only use digital circuitry are called all-digital PLLs.

The standard analog PLL implementation can be difficult. Analog PLLs with digital phase detectors are essentially mixed signal devices. Normally, analog and digital portions of a mixed signal board should be separated above their own ground planes, and the two ground planes should be separated from each other by a gap.

The analog ground pin on an analog PLL may need to be connected to the digital ground plane if an analog PLL is integrated into another digital circuit (for example, in a DSP). Different component manufacturers will have different recommendations for how these circuits should be implemented on a PCB.


Wireless module with chip antenna

Your circuit board should not be your nightmare

It’s also important to match the input impedance for the reference signal in order to minimize reflections as these can cause interference to become superimposed on the output signal from the PLL and the demodulated signal.  You can also use an impedance-controlled layer stack to ensure that your trace impedance matches both ends of an interconnect. Using a small shunt capacitor between the input port and the analog ground can be used to decrease the slew rate of the incoming signal.

In the case of using a PLL for frequency demodulation, the error signal output from the loop filter is the demodulated signal. Analog PLLs (both integer and fractional PLLs) should send this digital output over the digital ground plane in order to minimize the loop area for this signal. You need to make sure that the digital circuitry does not induce noise in the analog circuitry, and vice versa.

If you’re looking for the tools to get your PCB layout right, Cadence has the capacity and then some to keep your electronics innovating. With Allegro and its assorted capacities, PCB design for phase locked loops and other wireless communication technologies will be made easy.

If you’re looking to learn more about how Cadence has the solution for you, talk to us and our team of experts.