Issue link: https://resources.pcb.cadence.com/i/1532922
We went with Closest Plane for this example. In the remaining cells that go to the right, you can specify the amount of acceptable gaps in the return path, the length of copper to ignore, adjacent void spacings and so on. Managing the return path for signals is just as important as managing the signal routes themselves for impedance control, signal integrity (to reduce impedance discontinuity, and therefore discourage signal reflections) and electromagnetic compatibility. Max Pad Gap set to 30 mils (0.762 mm) and the Length Ignore set to 40 mils (1.016 mm). As usual, any values entered are immediately applied to the nets that use this Electrical Constraint Set as seen below. Looks like the design is constrained nicely! We are at the end of the Electrical Constraints examples that you will need for most high-speed digital designs. Let us continue with Physical Constraints, especially for differential pairs. Advanced Physical Constraints In this section we address the physical constraints in an example physical constraint set that you need to apply for practical high-speed or complex designs. It is understood that you already know how to create constraint sets and apply them to net classes, groups and regions. So, we will only show the constraint set, then where they got applied while giving some context to their importance. Trace Width For physical constraints we already set the Line Width (trace width), the minimum width (narrows down to 0.100 mm = 3.93 mils) and maximum length we allow a neck to run (about 5 mm = 196 mils, but no longer). 56 www.cadence.com OrCAD X Constraint Management Guide