Skip to main content

What is Under-Voltage Lockout (UVLO)?

Under-voltage lockout

Power regulator ICs have become more sophisticated over the years with many features, including safety and configuration features that are essential for maintaining high power conversion efficiency during operation. Components with a wide input range can include a feature known as under-voltage lockout (UVLO). From a high level view, this feature appears as a kind of enable feature, but it is much more important for configuring a power converter’s operation. Here’s how this feature works.

Under-Voltage Lockout Feature on PMICs

A UVLO feature on a PMIC controls when the PMIC turns on and off, essentially only allowing the device to output power once the input voltage rises above some threshold. When the regulator output is decreasing, output will cease once the input voltage falls below some threshold. The UVLO feature ensures that the device remains inactive or "locked out" until the input voltage returns to an acceptable range.

This function is very different from an enable pin. While the design of the converter could technically allow operation below the UVLO threshold, there could be problems like low power conversion efficiency or excess phase margin in the feedback loop leading to regulation instability. A UVLO feature protects against this.

The circuitry required to implement the UVLO feature typically consists of the following components:

  • Voltage reference
  • Voltage divider
  • Comparator, sometimes with hysteresis
  • Output control loop

By comparing the input voltage against a reference, the internal comparator circuit can enable or disable the regulator’s output function automatically. This could be applied with some delay so that the output slowly rises up to its intended level, which could also help prevent transients and prevent on/off output switching if the input voltage has some fluctuations.


UVLO is a feature in some integrated power supplies and power regulators, but if you take a power regulator module and look at the pinout in the datasheet, you may notice that there is a UVLO pin. For example, take a look at the pinout for the telecom quarter-brick power regulator shown below. These pinouts are highly standardized and will include two important pins for protection and stability: UVLO and Bus. The UVLO pin is specified as pin 10 in the pinout; note that the pin numbering on this particular component is not sequential.

Under-voltage lockout quarter brick

This quarter brick power regulator includes a UVLO pin.

Take a look at the quarter-brick module above; the pinout shows a UVLO pin and a Remote ON/OFF pin. The second of these pins is essentially an EN pin (or equivalently a SHDN pin), which is used to toggle the regulator ON or OFF.

Some power regulators will have both pins present. In this case, the UVLO pin sets a threshold for turn-on, but the EN pin must be held ON (or SHDN held OFF) in order for the regulator to turn on, regardless of the UVLO pin threshold. If there is a fixed UVLO feature and an EN pin on the same package, the integrated UVLO feature will still function in the same way as long as the EN pin is held ON.

The table below shows the various situations involving an EN pin and UVLO pin or integrated UVLO feature.

EN pin and UVLO pin or feature

  • Regulator is only on when EN pin is HIGH
  • UVLO pin allows adjustment of the UVLO threshold

EN pin, no UVLO feature

  • Regulator is only active when EN pin is HIGH
  • External circuit could be used to set a threshold for toggling the EN pin (see below)

UVLO pin or feature only

  • Regulator is always ON and can output power
  • UVLO pin allows adjustment of the UVLO threshold

As seen above, these pins allow more control over the functions of a power regulator. When using wide-input regulators, such as wide-input buck-boost converters, the UVLO threshold can be set just to the level where the efficiency starts to drop out, which could be slightly above the low end of the bias range. This would ensure the regulator is always operating within a high-efficiency range.

There is another approach where an EN pin can be used as a UVLO pin with hysteresis. This would involve another circuit using a comparator. By using some reference voltage source, a comparator could be used to set a threshold on the EN pin such that EN is only HIGH when the input voltage is above the threshold. This mimics UVLO functionality on a single pin.

Whenever you want to simulate power systems with custom timing and under-voltage lockout features, use the complete set of simulation tools in PSpice from Cadence. PSpice users can access a powerful SPICE simulator as well as specialty design capabilities like model creation, graphing and analysis tools, and much more.

Subscribe to our newsletter for the latest updates. If you’re looking to learn more about how Cadence has the solution for you, talk to our team of experts.