Tips to Remove Noise on Via to Via Coupling
It’s common knowledge that multilayer PCB design can mitigate the EMI/EMC effects of high speed signal circuits. Conductive vias provide connectivity between the multiple layers in a PCB, giving the designer room to separate AC and DC signals, optimize the location of components, and provide ample ground planes for noise reduction.
As a result, multilayer PCBs tend to be more compact, allowing the designer to fit more functionality into a smaller form factor—a crucial element in a world where the demand for ever smaller and more powerful electronics is always rising.
But despite these advantages over single layer boards, multilayer boards aren’t without their own EMI/EMC challenges. Via-to-via coupling, in particular, remains a challenging aspect in designing multilayer PCBs. In this post we’ll cover some tips for removing noise from your vias.
What is a Via anyway?
VIA is short for vertical interconnect access. Via is also the latin word for path. As a result, the acronym is treated colloquially as a word, “via,” instead of an acronym “VIA.”
Like its namesake suggests, vias provide vertical connections between the layers in a multilayer PCB. The anatomy of a via consists of:
Barrel, which is the conductive tube that forms the body of the via. It plates the hole drilled through the insulating layer between planes in a multilayer board.
Pad, extends radially outward from the top of the barrel to connect the via to the component, plane, or trace on that layer.
Antipad is the void between the plane layer and the via that prevents the plane from being short-circuited to the via.
Via-to-via crosstalk is a major problem in PCB design
Whether your vias are blind, buried, or through-hole, the same concerns for crosstalk and signal speed that apply horizontally to your traces also apply to your vertical vias. Coupling occurs whenever you have current flowing through two or more conductive paths in parallel.
Crosstalk occurs when the coupling interference is bad enough to interfere with the quality of a signal. Crosstalk can be inductive or capacitive, let’s take a closer look at these two modes of interference.
Inductive crosstalk: Changing signal in one via generates a magnetic field which interferes with a “victim” via’s signal by inducing an electromotive force across the conductor.
Capacitive crosstalk: When two conductors are separated by a small gap, such as the antipad of a via, you get a simple capacitor that can store energy electrostatically. Parasitic capacitance can slow signals, mess with clock speeds, and timings.
In low speed circuits, crosstalk due to parasitic capacitance tends to be a bigger problem, as there is enough time for charge to collect around the antipad to plane junction. In higher speed circuits, inductance is a bigger problem, as the magnetic field generated by fast changing signal in a via can induce a stronger electromotive force on a neighboring via.
Here are some tips
Coupling in PCB design is a natural part of life. The trick is to design around this reality to prevent crosstalk. Here are some common tips and tricks for reducing noise around vias.
Differentially paired vias. Route vias between layers in multilayer boards as differential pairs (one via carries a signal, the other the return). The closer the differentially paired vias, the better the noise reduction with the tradeoff of a higher parasitic mutual capacitance. In high speed signal circuits, parasitic capacitance isn’t as much of an issue.
Via fences: A via fence (a.k.a via shield) is a row of vias that line an RF signal’s route path to reduce crosstalk and EMI effects.
Via stitching: You can create a strong vertical connection between two planes in a multilayer board by filling all the free areas on the board with vias. This reduces the return path and results in a low impedance connection.
Decoupling capacitors: one way to prevent parasitic capacitance is to provide a local capacitor to the system to prevent voltage spikes by providing a steady reservoir of energy to the circuit. Since coupling can be capacitive or inductive, decoupling capacitors are less effective in high signal circuits where impedance has a higher inductive element.
It’s no longer enough to only care about EMI and crosstalk in the horizontal plane of a board. As demand for high speed multilayer boards rises, so too does the need to understand and follow best practices for managing the vias that make these multilayer configurations possible.
The math surrounding the management of EMI and crosstalk across a multilayer PCB can get quite complex. That’s why it’s important to use 3D modeling and PCB design analysis software to ensure that all variables are accounted for when you’re finally ready for production.