The large exposed pad with the array of vias in the above image is often fully coated with solder paste prior to reflow. While the intention is to ensure the strongest possible bond in the device, the result is sometimes a particular solder defect known as voiding. When voiding occurs, defects appear in the solder, typically on large pads below SMD ICs with die-attached pads. These bottom-terminated components cannot be visually inspected for voiding following assembly, so there is a possibility for defects to arise during the assembly process.
Because these defects can go unnoticed without X-ray inspection, or they may not be caught in statistical process control, there should be some measures taken to help prevent voiding if possible. Voiding can be controlled by an assembler, by a designer, or both. In this article, we’ll look at some simple steps to help prevent voiding, particularly in bottom-terminated components with large pads.
What Causes Solder Voiding?
Although miniaturization has driven many component sizes smaller, there are many bottom-terminated components still on the market that are widely used. Some of these come in QFN, LGA, or CSP packaging with a large pad exposed on the bottom of the component. The pad is normally soldered to a large SMD landing pad, and during soldering, voids can form in the solidified solder.
The issue here is one of solder flow as the solder is not restricted across a large pad. This can result from incomplete wetting in some areas of the pad during reflow. The result is similar to what is shown below.
Joo, H.-S., et al. "Mechanical properties and microstructural evolution of solder alloys fabricated using laser-assisted bonding." Journal of Materials Science: Materials in Electronics 31 (2020): 22926-22932.
(Alt Text: Solder voiding)
Because the solution is simply one of limiting solder flow, there are two simple options that can help prevent voiding: using solder preform components and modifying footprint data.
Solder preforms are solid manufactured blocks of solder that can be placed directly on SMD pads. They can then pass through a reflow soldering oven in the standard manner as other components that have received solder paste application. The solder preforms typically used on SMD components can be in a variety of shapes or arrays (circular, square pads, etc.). Because preforms are solid, they limit the area where the solder is applied until the assembly passes through reflow.
Example solder preforms.
The advantage of using a solder preform is they are generally compatible with reflow profiles specified for other components, so they can pass through assembly without special processing. Before specifying these in your BOM or requesting them from an assembler, make sure your assembler has a process to place these (either manual or automated). Smaller solder preforms may be available in tape-and-reel packaging, so they can be easily included in automated assembly with a pick-and-place machine.
Reduce Solder Paste Area
Because solder voiding is associated with the area being occupied by solder paste on an SMD pad, the obvious option is to reduce the paste mask aperture. This can reduce BOM costs when applied to larger SMD pads that have experienced significant voiding. The reason for this is elimination of a solder preform. Reducing the solder paste area comes with a tradeoff, namely that the solder paste area is smaller and thus the mechanical strength of the bond on the SMD pad is lower.
The other equivalent option is to use solder paste printing during assembly rather than manual application of solder paste through a mask. Printing can be set to dispense in only certain areas that match the paste mask apertures. You could even form the same pattern that you might find in a solder preform by mimicking the preform shape in your paste mask layer. These paste mask designs in footprint data can have very unique shapes as shown below.
Example paste mask definition under IPC-7093A. If this footprint results in voiding, a preform can be used or the paste mask apertures could be made smaller.
As a designer, it’s your job to understand how assembly is to proceed for your bottom-terminated components. If needed, you will have to specify whether the assembler should proceed with a solder preform, and ideally you should include the preform in the BOM. Make sure to discuss placement details (whether manual or with a pick-and-place) with your manufacturer.
If you want to go through the time needed to modify footprints to reduce solder paste area, this is appropriate but consider applying this change to the global footprint used in your component libraries. If you need the modified footprint in one board, then it’s likely you will need to apply the modified footprint in other boards. Applying the change to your libraries ensures all your design data will have consistent footprints.
Whenever you need to create footprints and define placement for solder preforms, make sure you use the industry’s best CAD tools in OrCAD from Cadence to prepare your PCB design for volume assembly. OrCAD is the industry’s best PCB design and analysis software with utilities covering schematic capture, PCB layout and routing, and manufacturing. OrCAD users can access a complete set of schematic capture features, mixed-signal simulations in PSpice, and powerful CAD features, and much more.