ADC Filter Circuit Designs
Let’s set the scene: you have an ADC, but it has some phantom noise problems due to some issue on the signal itself, due to the stability of the reference, or due to the internal operation of the ADC in the presence of excess charge. In all of these instances, an ADC filter circuit might be needed to ensure highly precise signal acquisition. Designing ADC filter circuits is rather simple when viewed from the signal perspective, but care should be taken when filtering a reference or input charge compensation.
In this article, we’ll examine the design steps involved in building ADC filter circuits to target noise in three areas. Different types of ADC filter circuits should be applied in different situations, and not all ADCs will need to include every possible filtration circuit to operate properly. Pay attention to these points
Types of ADC Filters
The three primary areas where a circuit designer may need to reduce noise in an ADC are:
- Filtering the reference voltage
- Filtering the signal
- Charge compensation at ADC inputs
Reference Voltage Filtering
All ADCs need a precision reference voltage source that will be used as a comparison to the signal level and will determine the level of quantization. This precision reference can have its own output noise, or the routing between the reference and the ADC’s VREF pin could pick up noise from some other source. In either case, filtering may be needed to ensure low-noise signal acquisition.
The typical filter for an ADC voltage reference is a simple low-ESR capacitor (ceramic chip capacitor). The idea with this capacitor is to provide compensation for any variation in the potential between the VREF rail and the system’s analog ground pin. This is as simple as putting a capacitor at the VREF pin by the ADC. Some components will require this capacitor in order to function properly; typical sizes are 1-10 uF or higher.
Example capacitor selection for the analog and digital voltage rails on an ADC.
This technique is intended to compensate for a transient response at the ADC input when the ADC switches between acquisition and conversion modes. The ADC input pin has some capacitance (this is inherent due to the internal structure of modern ICs) that is used for measurement and digitization of an input signal.
When the internal clock causes a switch from acquisition to conversion, this voltage across this internal capacitance is measured and quantized. This capacitance can momentarily discharge and could produce what appears to be a quantization error. This is usually not noticed at low resolution, but at high resolution it can create an error.
The solution is to place an RC circuit on the input of the ADC. A simple RC filter should be designed such that its discharge time is less than the acquisition time (fast enough to reach close to VREF before the next conversion phase), but such that the discharge time is long enough to limit the noise bandwidth:
Charge compensation filter design for an ADC input.
Here we cannot limit the noise bandwidth to zero because this would cause the filter’s time constant to violate the acquisition time. The typical strategy here is to maximize the filter capacitor for a given resistor value. To get to even lower signal bandwidth, the resistor could be increased in size to further limit noise.
These circuits are normally designed in addition to an amplification circuit to scale the input signal to the desired value, as is discussed in this article. The idea here is much the same as in the above case of charge compensation; limit the bandwidth so that higher frequency noise sources are cut off from the ADC input. However, make sure your amplification circuit and filter circuit are designed together to ensure low noise without being loaded down by any charge compensation on the ADC input.
What Happens at Higher Frequencies?
Systems that need to operate at higher frequencies may still have some type of filtering or charge compensation in the front-end of the ADC. In fact, some SoCs that require some analog-to-digital conversion will include the ADC in the chip, so you won’t have to use any external components for the ADC, and you most likely will not need to design a filter/charge compensation yourself from discrete components. There are several reasons this might be integrated into the semiconductor die rather than being placed as discretes:
- Convenience for the designer, so they can use the component right off the shelf
- Filter circuits could be complex and there could be design errors
- The components in filter circuits could be non-ideal if the wrong components are used
- At very high frequencies, signals can exhibit propagation effects within the filter circuit
- These inputs will generally be impedance matched to prevent reflections
In the higher-frequency range where most advanced applications operate, focus more on the layout and routing of the signal into the component as opposed to designing a filter. Designing the stackup to provide an appropriate grounding strategy for your ADC will solve most of the simpler noise problems that might rise in a mixed-signal system and is the first step to aiding precision signal measurements.
When you’re ready to design and simulate your ADC filter circuits, make sure you use the industry’s best circuit design and simulation tools in PSpice from Cadence. PSpice users can access a powerful SPICE simulator as well as specialty design capabilities like model creation, graphing and analysis tools, and much more.
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