Working with High Speed and RF PCB Trace Lengths in Your Design

July 2, 2019 Cadence PCB Solutions

Picture of woman getting a traffic ticket for unsafe driving speeds

 

There’s a police officer that lives down the street from me. He’s a really nice guy and we have a lot in common, except for how we interpret the rules of the road governing safe driving speeds. I tend to view a posted speed sign as more of a “guideline,” while he feels that it should be strictly enforced. We have joked about this for years until he finally asked if I held that same casual attitude when it comes to the electronics that I design. I had to admit, he got me on that one.

If we were to approach PCB design with the same attitude I have about driving the speed limit, we probably wouldn’t ever get a board to power up let alone work correctly. Let’s face it, in addition to keeping us safe, the rules of the road are there to guide us so that traffic moves efficiently and without interruption. In the same way, PCB design rules and constraints also provide a guide for design in order for the board to function efficiently and without interruption. Let’s take a closer look at how these rules and constraints can be used to help us control the high speed and RF PCB trace lengths in the circuit boards we design.

Without Proper Care, the High Speed and RF PCB Trace Lengths in Your Design Can Cause Problems

Whereas PCB design used to be very forgiving with how the traces were routed, that is no longer the case with today’s high speed designs. Many years ago it was standard practice to simply throw the design into the autorouter, and then use it the way it came out. That kind of routing on today’s high speed designs however will result in a board full of signal integrity issues including reflection, signal loss, timing and even ground bounce.

Long traces on high speed transmission lines can act as antennas and radiate electromagnetic interference (EMI). All signals travel as electromagnetic waves and radiate more at higher frequencies which results in interference. To reduce the potential for EMI, it is best to keep these traces as short as possible and away from other traces. And as always in high speed design, it is a good practice to make sure that there is an adequate ground plane under them for a return path.

There are a lot of other design issues such as board layer stackup and component placement that factor into signal integrity difficulties. But how the traces are routed is usually a big part of the problem:

 

  • Impedance: For a signal to move through a trace without any distortion it needs a trace that doesn’t have any change in impedance. Trace impedance can vary with changes to the width of the trace, going through a via to another layer, or if there are stubs in the routing.

  • Crosstalk: When high speed lines with a lot of transmitting activity in them are too close to each other, it can result in inductive and capacitive coupling. To guard against this these traces need to have more space between them, they need to have shorter parallel running lengths, and they must be as close as possible to a ground plane.

  • Non-Ideal Return Paths: Non-ideal return paths present difficulties in the areas of limited speed and reliability of high-speed designs. Being sensitive to and dependent on both gap width and gap length will enable more accurate timing. Utilizing a decoupling capacitor properly can alleviate some timing and gap effect issues in non-ideal return paths. 

  • Differential Signals: With improper differential signal spacing, your design may become susceptible to crosstalk. Placing high-speed traces near components or devices that use or duplicate clock signals can result in interference. Consistent trace width can also encourage matched transmission line impedance. 

 

The best way to keep your high speed and RF PCB trace lengths the way you need them to be is to use design rules and constraints when you route them.

 

Screenshot of OrCAD PCB Designer 3D layout

Advanced high speed design rules are necessary for today’s designs

 

How Design Rules and Constraints can Help to Keep Trace Lengths in Line

For those of us who have been using PCB design CAD systems for a long time, we are all very aware of the design rules that are built into the tools. There are rules that govern the width and spacing for traces as well as the clearances for traces to other objects like pads and vias. There are also rules for clearances between components, and clearances to other board features. For the most part these rules are set up to make sure that the board is designed to the fabrication and assembly requirements of your contract manufacturer so the board can be built.

There is another purpose for design rules and constraints, however, and that is in maintaining electrical tolerances for high speed design. These rules are in addition to regular PCB DRCs. For instance the minimum trace width on a design may be 0.005 inches wide, but you may have specific high speed nets that need 0.010 inches spacing between them. Although that is a simple example, there are a lot more rules that can help in the design of high speed and RF traces:

 

  • Trace Lengths: This rule allows the user to set a target value for the trace so that it is routed to a specific length.

  • Trace Length Matching: This allows the user to match up the lengths of multiple traces to coordinate the timing of their signals.

  • Differential Pairs: This is a rule tied to a routing feature that allows the user to route the two nets of a differential pair tightly together.

  • Trace Tuning: For those traces that require more length, this is another rule tied to a function that will create serpentine routing to achieve their target length.

  • Net Classes: For groups of high speed nets that require unique design rules, they can all be assigned to a specific high speed net class for a specific set of rules.

  • Signal Paths: High speed design often involves signals that travel through a series of nets. A signal would start from one IC, goes through different components such as resistors, and then terminate on another IC. Specialized rules combine these different nets in the signal path to be considered as one complete signal.

 

This is just a sampling of the different kinds of rules that are needed for effective high speed and RF design, but there is a lot more that can be done.

 

Screenshot of OrCAD constraint manager for high speed and RF PCB trace lengths

OrCAD PCB Designer’s constraint manager gives you a lot of high speed design control

 

Let Your PCB Design Tools Do the Work

The most advanced PCB design tools today can do much more than what the rules we’ve listed so far can do. They can also give you the ability to work with the electrical characteristics of the net including impedance, propagation delays, and coverage in etch. These tools will have the ability to analyze what’s been routed on the board in order to report the results back to you as well as plugging the results into simulation and analysis tools for further evaluation.

The day for turning a blind eye to how the traces are routed on our PCB designs is long over. Fortunately there are PCB design systems today that can provide an amazing amount of help. OrCAD PCB Designer from Cadence is a tool that comes with the ability to work with the high speed design rules and constraints that we’ve been talking about here.

If you’re looking to learn more about how Cadence has the solution for you, talk to us and our team of experts

About the Author

Cadence PCB solutions is a complete front to back design tool to enable fast and efficient product creation. Cadence enables users accurately shorten design cycles to hand off to manufacturing through modern, IPC-2581 industry standard.

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