Whether they are called Bring-Up Boards, Break-Out Boards or Device Under Test cards, supporting a chip team with PCBs to characterize a new device is a specialty unto itself. BUBs, BOBs and DUTs are the coin of the realm. My initiation was actually doing mechanical design for a joint venture between Spectra Physics and Xerox. A think tank called Spectra Diode Labs had a gallium arsenide fab where the people in the bunny suits made laser diodes.
The most memorable day was when one of the air sniffers malfunctioned and the klaxons went off to warn us that we might be inhaling arsenic. Arsenic! Don’t bother to save your data or grab your coat with the car keys in the pocket, just get out of there and give that building some healthy social distance. It would be best if you could do that without breathing! Two hours later, I was relieved to learn that it was a false alarm.
“When a new iteration of a device came out of the gate, the hardware team went on high alert.”
My next stop was at an LDMOS chip house that made high-power RF amplifiers for FM radio broadcasting and cellular base stations among other things. Later on, I was recruited into a low-power RF chip maker for the WiFi market. The founder of the company was quite the innovator and had some serious intellectual property. They were fabless and eventually acquired by the equally fabless Qualcomm corporation.
A common thread ran through each of these employers. When a new iteration of a device came out of the gate, the hardware team went on high alert. We always had our best guess at the bring-up board waiting for the device. It would start with a chip-on-board test fixture so we didn’t have to wait for the packaging to happen.
Figure 1. Image Credit: Author - This DUT card form factor was used hundreds of times to evaluate different devices that used a common test fixture.
Getting Ready For Day-One After the Chip Comes In
We would get some insights from the bare die and incorporate them into the solder-down DUT card. Something strange would always happen with the new silicon or silicon germanium or whatever flavor it was. The team would scramble to find a solution and the board designers would scramble to get a new PCB that hopefully improved the situation. Rinse and repeat!
There’s millions if not billions of gates in a device so tracking down and fixing the inevitable bugs was up to us. If it was unsolvable at the board level, then a “metal” spin of the device might be the next resort. Metal spins still take time but not as bad as a full respin of a chip. The PCB equivalent would be altering the routing but not moving any components or vias. The fab and assembly drawings are unchanged but the artwork is updated.
With Qualcomm in particular, they don't sell anything but reference designs. They will design the chips and get them from a foundry. They will design the boards and continually redesign them until they get the device to work as intended. During this phase, cost is no object. We could use as many layers as it took. The idea was to only have to worry about the device rather than debugging a PCB at the same time.
Figure 2. Image Credit: Author - FPGAs require attention as well but they are more elastic than an ASIC.
Once the chip or chip set has been tamed, it comes down to finding a way to get respectable performance out of the system using lower tech boards while compressing the circuit. Making the circuit smaller so that it fit inside of a rectangular shield was mainly for the marketing team. The potential for problems start to multiply.
As the silicon area shrinks, the edge rates of the circuits increase. In turn, the signal integrity issues tend to skyrocket right along with the thermal challenges. Condensing the circuit puts more signals in harm’s way meaning that a little detail can have an oversized impact. That fact locks us into a cycle of simulation and iteration.
We don’t have forever to solve these problems. The stakes are very high in a competitive space where the winner makes the most money. There are always other chip makers striving for the same sockets. Post silicon validation is one of the keys to success. Time to market is the key metric.
Sustaining Engineering - How To Keep the Chip Moving
All of that made for a rush of work with every generation of the chip set. As things settled down, we pivoted over to designing a socketed version of the characterization boards. The idea here was to screen the chips for obvious failures. Again, it wasn’t because they were making lots of chips.
The plan was to offer them to the customers who would use them to screen out bad die or packaging from their own foundry. Probe cards for the devices in the 1000+ pin club can be very intense even though their main purpose is simply to fan out all of the pins. What you see in Figure 3 is for a device with about 100 pins.
Figure 3. Image Credit: Author - Break-Out boards have typical features for fault checking every aspect of the device(s). The green board has the device under test and the blue board is used to perform the diagnostics.
Division of labor kept the library functions in a separate group. Design notes and other details had been worked out quite well by the home team down in San Diego. They had a proto-type SMD line that established all of the component spacing requirements. A lot of functions were automated so that we could focus on placement and routing. No start-up can possibly be this organized.
Continuous Improvement - An Imperative for Survival
Any time an error or question came up from the PCB vendor, a note was added to the fab drawing template in order to ensure that the problem didn’t repeat itself. Page-one was nothing but notes. Making the doc package consisted of clicking a few boxes to indicate whether the board had gold fingers, micro-vias or other novelties. Board dimensions were scraped from the outline drawing and there was always an outline drawing first. I was spoiled!
Eventually the dust settled and the team had all of the PCBs they needed. Perhaps, there was a cut and jumper, maybe a value or component change. Work became scarce and those are the longest of days. It was a good time to invest in learning something new or taking a well deserved vacation. The doldrums could last a few months before the next ramp-up. Then, the whole cycle would repeat.
The process would turn us into experts in a limited and well defined field. To this day, I’ll see a WiFi, GPS, NFC or Bluetooth chip and know exactly what I’m going to do with it. If you find an opportunity to run a CAD station for a CPU or GPU chip maker, by all means jump in and learn everything you can. There will always be system integrators looking for experts in those fields. As they say at the poker table, all you need is a chip and a chair.