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PCB West 2022 Another Chance to Learn About the Occupation

On Wednesday, October 5th, the Santa Clara Convention Center was bustling with conferences with PCB West in the middle of things. Row upon row of vendors filled the booths while people made their way around the show. Fabricators, flex in particular, made a good cross section of the show while giving space to their suppliers on the materials side. My interest was primarily those suppliers even though the fabricators had better showcases.

Besides that, there were solution providers for PCB design, assembly, test and so on. They are all more than happy to discuss their solutions so it is probably a good idea to have some sort of focus before going onto the convention floor. Is there a burning issue back at the office? Turn it into a survey question so you can find the vendors who can help you complete your deliverables. This has to be more valuable than collecting pens and checking out the sample goods on display.

Seeing one of my old boards in a showcase is a treat though. It’s proof that they had to work hard on that one and are proud of the achievement. Figure 1 shows a four-layer board but the secondary side has the equivalent of 45 oz Copper. That’s the same as the overall thickness of the average PCB in one copper layer. The dielectric is Isola’s thin GETEK material for RF performance. We were providing the multi-carrier amplifiers that go adjacent to cell towers; thought I’d mention that trip down memory lane.

Figure 1. Image Credit: Author - Something from nearly twenty years ago still makes the rounds with one of the PCB fabrication vendors. Those countersunk vias at the edge of the slot were part of the first patent on which I was listed as a contributor. It really was groundbreaking at the time.

It wasn’t long before a long time follower, Juan C Frias caught up with me. The Printed Circuit Engineering Association (PCEA) is the new presenter of this conference and they had a booth at the end of the last row. Juan was helping out in that booth while the PCEA president Mike Bueto was doing interviews off in the corner. A number of hotshots in the PCB game passed by while I was holding the fort. Suzy Webb and Rick Hartley were both there as speakers.

There is one more name to drop. You see, I was telling Juan about the time I was taking the Certified Interconnect Designer (CID+) course at that same location about ten years ago. The story I was relating was the bit where the instructor – who actually owned a fabrication house – said that we had two options when dealing with technical questions. Option one: Agree with the vendor’s recommendations and move on with the job. Option two: Continue to discuss the details while your project sits there.

Figure 2. Image Credit: Author - Gary Ferarri talking shop in the PCEA booth at PCB West

I had credited those remarks to Gary Ferrari. Within a few minutes, Suzy called for everyone’s attention to say that we were going to sing Happy Birthday to Gary who just happened to be in the PCEA booth number 617 at the time. I’m name dropping him on one side of the booth while there he is still carrying the torch.

A lot of other people were there too. From what I’ve read, it was the largest crowd in over a decade. Attendees like me filled the aisles and populated the break-out rooms for speaking engagements. The free session that animated me most was one about the 21 Things That Put Your PCB On Hold. It used to be 10 things but we as designers have found new ways to confuse the vendors.

To be fair, we’re only adjusting to the shrinking package sizes and the precarious supply chain as best we can. Errors were easier to avoid when components were big enough to pick up with your fingers rather than tweezers. Now, we’re filling in the space around the die that used to be part of those larger packages. Chip scale packaging has left us with those fine pitch devices where the job of separating the signals from the silicon out is all on the printed circuit board. That has been the technology driver all along.

Figure 3. Image Credit: Author - Technology roadmaps and other information is readily available in order to see what’s coming next.

Capture pads for vias are one of the places where we could help the fabricators help us to more reliable boards. One of the things we do that bothers our vendors is removing non-functional pads and then encroaching on the tolerance zone for the hole where the pad used to be located.

The presenters wanted to be very clear on how the drill can wander off of true position and still be within IPC class 2 specifications. First, note that the hole starts out oversized to accommodate plating on the way to a finished size. Second, the hole can be off center in the X and Y dimensions or even go into the board at a slightly off perpendicular angle to the surface.

The notion that the hole as created can exceed the boundary of the capture pad and eat into the air gap from the via to nearby copper should be enough to convince us to account for this variability. We need the space the pad provides and more on every layer. I knew this part but have run into boards where the original designer used wishful thinking rather than knowing how much variability is introduced as far a layer to layer registration is concerned.

There was a lively discussion on plating the pad as well as the barrel of the hole. Whether it is a high aspect ratio or holes crowded together, there are a lot of ways the process can go off the rails. The takeaway for me is to increase the standard pad for a via from 0.45 mm up to 0.5 mm given a 0.2 mm hole whenever that is feasible.

The expanded pad is beyond IPC class 2 but falls short of class 3. With this geometry, it is possible to call out the class 2 but modify the positional accuracy where the hole does not break out from the pad. You have a note that stipulates no break-out on the vias. Functionally, this gives you a true picture of where the actual hole could land.

Of course, class 3 adds another 50 micrometers all around as a minimum annular ring. There is a place for that but what I’m getting at is raising the reliability to the level expected of telecom equipment and other infrastructure whose function is more vital than consumer electronics but less so than aerospace or life support gear.

So with that thought aside, the PCB West conference did deliver a chance to survey the field to find vendors suited to solving your pain points. There were also plenty of people sharing knowledge and connecting in the pursuit of a better PCB design flow. This is a good trend and the website is already up for next year’s iteration. Hope to see you then.

About the Author

John Burkhert Jr is a career PCB Designer experienced in Military, Telecom, Consumer Hardware and lately, the Automotive industry. Originally, an RF specialist -- compelled to flip the bit now and then to fill the need for high-speed digital design. John enjoys playing bass and racing bikes when he's not writing about or performing PCB layout. You can find John on LinkedIn.

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