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Input Bias Current Op-Amps Improve Practical Models

Key Takeaways

  • Input bias current is present in real-world op-amps because infinite input impedance is a theoretical concept.

  • BJT op-amps have lower input impedance than JFET/CMOS types.

  • It’s possible to account for and cancel the error with resistive feedback networks – or a simple offset adjustment with a potentiometer.

Input bias current op-amp models substitute the finite differential impedance for the ideal infinite value.

Input bias current op-amp models substitute the finite differential impedance for the ideal infinite value.

Ideally, op-amps circuit analysis is a linear element that amplifies or processes signals according to its feedback network. However, nonideal behavior arises in real-world settings due to the input bias on both differential inputs. While simplified models treat the impedance on either pin as infinite, some offset current can pass through in practical applications. Therefore, designers can realize more accurate parameters with an input bias current op-amp model accounting for this and other characteristics ignored in the ideal assessment.

Calibrating for Input Bias Current Op-Amp Models



Resistors on input

Placing a resistor in series with either differential input drops the voltage before amplification, greatly reducing the error. Entire cancellation is possible with the correct resistor network.

Power considerations may constrain the lower limit of the input resistors.

Offset adjustment

A potentiometer and resistor on the inverting input can account for the offset error.

An expensive and relatively bulky solution for a small IC – may not scale well in designs. 

Temperature calibration

Current flow will generally decrease as temperature increases, but material properties will greatly affect this. If the design operates at a stable temperature, it’s possible to cancel the error at one temperature.

Temperature-independent response makes this solution less suitable for applications with large temperature swings.

The Detrimental Effects of the Input Bias Current

While the basic approach to an op-amp is an idealized infinite impedance on the differential inputs, realistically, a small offset current  (fA ~ µA) passes through; the exact value range is dependent on the amplifier model (BJT or MOSFET, primarily). What may seem like an obvious observation underscores the importance of incorporating non-ideal attributes to improve performance. The input offset voltage that arises from the ratio of the input offset current over the source impedance can impact the signal characteristics if the impedance is too low; like the input offset voltage, the input offset current is the difference between the current flowing (typically) into the inverting and noninverting outputs. It’s important to note that impedance matching the inputs plays an important role: an input offset current between unmatched inputs has little explanatory value. Fortunately, most voltage feedback amplifier networks adhere to a reasonable impedance matching on the inputs.

Therefore, many chip packages contain an input bias current cancellation on the input with two NPN transistors to ensure the current flowing into the amplifier inputs is the offset between the base and source current. This implementation improves the amplifier's stability electrically and thermally yet faces limitations in high-frequency applications, as noise from the source and transistor bases can add together and undermine signal integrity. In the presence of current compensation circuitry, the input bias current and input offset current have the same magnitude. However, not all op-amps have a built-in compensation circuit; designs need a straightforward and more general method to implement adjustments.

Using Ohm’s Law principles, designers can adjust the input bias current on the noninverting input to match the feedback line. Consider a simple resistor feedback network on the inverting op-amp that uses one feedback resistor and an input resistor on the inverting input: an input resistor on the noninverting input is necessary that provides the same impedance (and thus input bias current). The noninverting input resistance would simply be the parallel equivalent resistance of the feedback and inverting input resistors. Be wary that the noninverting input resistor will need a bypass capacitor in parallel to remove noise on the line once the total resistance becomes appreciable (~ 1 kΩ). 

Measuring Input Bias Current Op-Amps

More involved treatments of an amplifier attempting to resolve the input bias current may require a measurement to establish a targetable current reading. While many approaches exist, two of the more common methods are switches or an integrator circuit for minimal input bias current values:

  • Switch-selector - A variation on the feedback resistor network described above that adds a second high-value resistor to the input alongside a parallel switch. The idea is that the designer can isolate the input bias current by switching between four possible switch arrangements: both open, both closed, or one open. Suppose the input offset voltage is already known (the exact value is the result of material and processing imperfections and thus varies). In that case, it’s trivial to determine the change in input offset voltage with the additional resistance and work backward to find the input bias current. Note that the range for the high-value input resistor depends on the amplifier model, running from several kΩ to GΩ.

  • Integrator circuit - Similar to the classic integrator circuit, it adds parallel switches across the capacitors to quantify the rate of voltage change. Operators can alternate the open/closed switch between the differential inputs to measure the inverting or noninverting input bias current sequentially.

Because input bias current exhibits more strongly in bipolar op-amps than in FET-based models, designers may want to minimize BJT usage to avoid the issue. While this is a reasonable approach and can work in certain applications (while also reaping the power efficiency of CMOS amplifiers), BJT performance in high-frequency circuits greatly outstrips that of CMOS due to the latter’s large increase in losses with high-speed switching. The increasing prevalence of high-frequency designs for faster transfer speeds means designers cannot simply ignore the detrimental effects of input bias current without a compensation circuit, whether discrete or as-packaged.

Cadence Solutions for Experimental Modeling

The input bias current op-amp model accounts for the input offset current and bias errors that can cause practical op-amp applications to diverge considerably from ideal calculations. While ideal op-amps are indispensable in the early goings of circuit analysis, design teams will want to transition to models that better encapsulate the real-world behavior of the op-amp. For highly accurate circuit models, Cadence’s PCB Design and Analysis Software suite gives design teams a comprehensive ECAD environment with powerful tools and customization options. Simulation results are then fed into OrCAD PCB Designer, ensuring DFM has never been easier or more thorough.

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