High Performance PCB Systems Design and Analysis Guide

You can create a dense, high performance PCB like this with the right design tools.

New designs have pushed signaling speeds and noise margins to the limit, and designers need to make themselves aware of all the tools available to properly design their boards for high performance. Systems that run at relatively moderate data rates with ~ns switching speeds are well known for particular signal integrity and power integrity problems like ringing, crosstalk, and jitter, but high performance PCB systems take these potential performance problems to a new level. Designing high performance PCB systems is as much about schematic design and engineering as it is about creating a stable layout.

When you look at the mobile/IoT space, data center environments, avionics, and upcoming areas like 5G and autonomous vehicles, you’ll find many parallels in these areas. Power integrity is an important issue in high performance PCB systems design as power instability can influence signal instabilities. Similarly, signal integrity problems have always become more prominent as data rates increase to Gbps levels, and rise/fall times in digital signals decrease to ps levels. Add to this the fact that many advanced systems are mixed signal devices, and your stackup, layout, and routing design become critical aspects that drive performance.

While your schematic designs are important for defining functionality in your board, your layout will determine some of the most important aspects of your board’s performance in terms of power and signal integrity. This requires proper routing and stackup design techniques to ensure your finished layout matches the functionality in your schematics. When you have access to a complete set of routing, stackup design, and post-layout analysis tools, you can design and verify your high performance PCB systems 

Designing for High Performance PCB Systems

High performance PCB systems design is all about ensuring your PCB meets or beats tolerances in six key areas:

• Power integrity: You need to ensure stable power with suppressed noise throughout your PCB. The +5 V output from your power supply should remain at +5 V when it reaches VCC pins, and it should not waver from this value when components draw current surges.

• Signal integrity: Any +5 V signal you send down a transmission line should appear as +5 V at the receiver. You also need to use the right clock recovery and channel compensation techniques to recover signals, particularly when using multilevel signalling schemes.

• Reference plane and return path management: As boards run with higher edge rates, higher frequencies, or both, return paths in a board need to be carefully managed to prevent interference. This is particularly important in mixed-signal boards as interference between analog and digital sections needs to be prevented.

• EMI control: There are a number of steps you should take to reduce radiated and conducted EMI within your board and away from your board. Similarly, if you want to pass EMC tests, you may need to take additional steps to confine EMI within your product’s packaging.

• Thermal management: Faster data rates and higher frequencies, even in components run as low as ~1 V, dissipate significant heat during full-scale operation. This is where you need to consider a thermal management strategy to keep your board temperatures within safe operating limits. This might involve a mix of active and passive thermal management techniques, depending on the environment in which your board will be deployed.

• Routing and stackup design: This is related to the five areas mentioned above. Routing and stackup go hand-in-hand in advanced PCB systems as they are critical for impedance control and crosstalk suppression throughout your board. Similarly, your stackup is a major determinant of power integrity in boards that run at low levels.

High performance PCB systems are more often than not designed as multiboard systems in order to fit in their enclosures. These systems can be designed in a backplane configuration (in data centers), motherboard/daughterboards (in high performance computing), or a complex arrangement of multiple flex/rigid-flex boards. All the areas mentioned above will become more complex when you work in a multiboard environment. Chief among these is signal integrity, return path management, and EMI control, which can create complex radiative emission behavior inside and outside a board.

High performance multiboard system in Allegro PCB Designer

High Performance PCB Design Considerations

The complex relationships between power integrity, signal integrity, EMI, stackup design, and routing in high performance PCB systems requires careful attention to your layout. A poor layout can leave you diagnosing potential signal noise sources and power problems that can be solved with the right design choices. Incorrect layout choices can exacerbate EMI and noise problems that would have been unnoticeable in lower speed/lower frequency systems. The place to start designing your next high performance PCB is your stackup as this will determine your subsequent impedance control, noise suppression, and routing strategy.

Once you receive your first prototypes, they’ll need to be subjected to a battery of tests to ensure they meet your high performance standards. If you want to eliminate a few prototyping and qualification runs for advanced devices, then consider the following points when building high performance PCB systems.

PCB Stackup for High Performance PCBs

Although stackup design was mentioned last in the above list, it should be the first place you start creating your design. Your stackup will then determine your routing and return path strategy. With Gbps boards that operate with sub-ns signal rise times, you’ll most likely be using impedance controlled differential pair routing in multiple signal lanes. The current draw in this environment can be extreme, but the right stackup will help ensure power stability as your board runs. The current draw also leads to a transient response in your board’s PDN, which can increase timing jitter/phase noise in the output of a driver, as well as clock jitter.

Keeping losses in check in your board may require working with an alternative substrate material, either with high-k or low-k dielectrics. The ideal stackup will use a material with a high dielectric constant (real part) and very low loss tangent, as this will provide higher interplane capacitance for power integrity and lower signal losses. Unfortunately, like most engineering design decisions, you won’t be able to satisfy both requirements simultaneously in every board and for every bandwidth. This is where post-layout and parasitic extraction simulations become critical for ensuring signals do not become excessively degraded due to dielectric losses and dispersion.

Read more about designing a high performance PCB stackup.

Example layer stackup for high performance PCB systems in Allegro PCB Designer

Impedance Controlled Transmission Line Routing

All traces will behave like transmission lines, although devices that run at lower speeds and lower frequencies do not have noticeable effects. This is not the case when you work with high performance PCB systems. Preventing signal reflections in your interconnects requires careful impedance control throughout an interconnect. As high performance PCBs use advanced multilevel signalling and modulation schemes, impedance control at low signal levels carries even tighter tolerances.

High performance PCBs with high performance signalling standards and modulation typically use differential pairs to route signals, which requires precise coupling and length matching to eliminate skew and suppress common mode noise in a signal lane. Your stackup will, in part, determine the trace dimensions you need to use to ensure consistent impedance throughout an interconnect. This will also determine the level of ringing that appears when a driver switches between output levels. Traces should also be routed over the shortest possible path to prevent signal distortion and accumulated losses during propagation.

If you’d like to learn more about controlled impedance routing for transmission lines, read about transmission line impedance design and termination.

HDI Routing in Rigid, Rigid-flex, and Flex PCBs

More advanced boards, especially in the data center and mobile environments, need to accommodate multiple channels with high data rates in an increasingly small footprint. This is where you need to use controlled impedance routing alongside HDI design to fit your system into the required package. In the mobile space, newer handsets only use rigid-flex or flex PCBs in order to create more space for larger batteries.

Making room for all required components without increasing footprints in mobile devices has forced more designers to work in the HDI regime. This involves the use of blind and buried vias to move between layers and higher layer counts with thinner layer thicknesses, all potentially placed on multiple fully-flex PCBs. With differential pairs in HDI boards, post-layout simulations become more important for ensuring precise coupling and impedance control throughout the length of the interconnect.

Here is some more information on HDI design for high performance PCBs.

High performance rigid-flex PCB design in 3DWorkbench

EMI Suppression and Shielding

High performance PCBs with small form factor need more than Faraday cage shielding to confine fields inside a device. Noise within a board can be conducted between components and can arise from a number of sources, including power supply noise, radiation due to strong transients, signal resonance on mismatched lines, and switching ICs.

Shielding cans are the poor man’s method for EMI shielding and may not be appropriate for all devices. More sophisticated techniques like via fence design, taking advantage of stripline routing and your stackup design, and eliminating noise sources are critical for reducing EMI. When it comes to high speed signalling standards, differential pairs are also preferred for EMI reasons, as they resist common mode noise and have significantly reduced radiation compared to single-ended transmission lines.

If you’d like to learn more, read about reducing EMI in high performance PCBs.

Thermal Management in PCBs

Components with high transistor density and large current draw will produce a significant amount of heat, requiring an active and/or passive thermal management strategy to keep component temperatures within safe limits. This can involve the use of heat sinks, fans, or more extreme thermal management methods to dissipate heat. Alternative substrate materials, such as ceramics, have a role to play here as these substrate materials can have higher thermal conductivity than FR4 or other high performance laminates.

If you’d like to learn more about transmission line effects, read about designing and simulating an impedance matching network.

Kick your active thermal management strategy into overdrive with water cooling.

PCB Design and Analysis for High Performance PCBs 

Creating high performance PCBs is all about using the right design tools and evaluating your design before your first prototyping run. Your simulation results will provide a baseline performance metric for comparing test and measurement results from your new board. If you want to get your design perfect, you’ll need the right suite of design tools for evaluating high performance PCBs for your next product.

Cadence’s full suite of PCB design and analysis tools are adaptable to any application, including high performance PCB systems design. The SI/PI Analysis Point Tools are ideal for simulating and analyzing your schematics and layouts to prevent signal and power integrity problems. The Back-End Board Layout and Routing Tools are ideal for creating PCB layouts with the most advanced routing and stackup techniques. These industry-standard features from Cadence form a complete electronics design and analysis solution for any application.

If you’re looking to learn more about how Cadence has the solution for you, talk to us and our team of experts.