● The Importance of Chemical Mechanical Polishing (CMP) with regard to the fabrication process
● CMP makes it possible to design and fabricate using VLSI technology
● The process of CMP increases PCBA functionality and mitigates failures like short circuits
Whether you are on the surface of Mars, like the soon-to-be Mars rover entitled Perseverance, or formulating designs on the surface of a sophisticated semiconductor technology like very large scale integration (VLSI), the condition of the surface matters. Moreover, it can affect functionality, performance, and in the case of PCBAs, manufacturability. For this reason, chemical mechanical polishing (CMP), or planarization, is a vital step regarding the fabrication process.
Chemical Mechanical Polishing or Planarization
Chemical mechanical polishing is a polishing process assisted by chemical reactions to remove surface materials. CMP is also a standard and critical manufacturing process practiced in the semiconductor industry to fabricate integrated circuits and memory disks.
CMP is often associated with the process called chemical mechanical planarization. However, when CMP is used to remove surface materials, we refer to it as chemical mechanical polishing. Similarly, if the process of CMP is used to smooth or flatten the surface, we refer to it as planarization.
CMP is considered to be a tribochemical process due to the synergy between corrosion and friction. And in general, chemical mechanical polishing is a robust fabrication technique that utilizes chemical oxidation and mechanical abrasion to eliminate undesired materials (debris) and achieve extreme levels of planarity.
The Importance of Chemical Mechanical Polishing in VLSI
Very large scale integration (VLSI) is a process of embedding, or integrating, hundreds of thousands of transistors onto a singular silicon semiconductor microchip. The conception of VLSI technology dates back to the late 1970s during a time when advanced level processor (computer) microchips were also in their development stages. One of the most common VLSI devices is a microcontroller.
Before VLSI, the majority of integrated circuits possessed limited functionality. An electronic circuit typically incorporates a RAM, CPU, ROM, and other peripherals on a single board. However, VLSI technology allows an IC designer to add all of these into one chip.
If we examine the electronics industry over the past several decades, we can see evidence of its rapid growth. This includes increased miniaturization, increased performance, and improved functionality. However, the need to place more components while steadily utilizing less space equates to lesser margins for error. Therefore, the need to ensure the total removal of debris from mounting surfaces is absolutely paramount. Hence the importance of chemical mechanical polishing in VLSI technology.
The use of CMP allows the addition of more components in a smaller package like pro-mini microcontrollers
The Process of Chemical Mechanical Polishing
The process of CMP is now a vital technique in use to smooth and remove debris from PCB surface topographies. Therefore, a fundamental understanding of the CMP process is critical to optimizing the production process and increasing overall control. This will, in turn, increase process yields as well as the throughput of the semiconductor industry as a whole.
The process itself utilizes an abrasive and corrosive chemical slurry (typically a colloid) in association with a retaining ring and polishing pad that is generally larger in diameter than the wafer. A dynamic polishing head presses the wafer and pad together, and it is held in place by a plastic retaining ring. The dynamic polishing head rotates upon various axes of rotation, which means that it is non-concentric.
Note: A colloid is a mixture in which one substance of microscopically dispersed insoluble or soluble particles is in suspension throughout another substance.
The CMP process removes unwanted debris or materials, and it tends to smooth out any irregular topography, thus making the wafer planar or flat. These actions are a necessity to prepare the wafer for the placement of additional circuit elements. In essence, the CMP process can selectively remove material based on its position or bring the entire surface to within the depth of field of a photolithography system.
Note: Photolithography is the standard method of PCB and microprocessor fabrication. The process utilizes light to make the conductive paths of a PCB layer, as well as the electronic components and paths, in the silicon wafer of a microprocessor.
The Physical Aspects of Chemical Mechanical Polishing
Typically, CMP tools incorporate a rotating and very flat plate that is covered by a pad. They mount the wafer in an upside-down position in a carrier/spindle on a backing film before the CMP process. A retaining ring holds the wafer in the correct horizontal position. During the loading and unloading of the wafer onto the tool, the process (carrier) uses a vacuum to prevent undesired particles from building up on the wafer surface.
Another part of the process incorporates a slurry introduction mechanism that deposits the slurry onto the pad. Both the carrier and the plate rotate while the carrier is kept oscillating. At this point, a downward pressure is applied to the carrier, thus pushing it against the pad. This is generally an average amount of downward force, but it requires local pressure to remove mechanisms. The downward force is reliant on the contact area, which depends on the structures of both the pad and wafer.
The pads have a roughness of 50 micrometers, therefore, it makes contact through the rough edges of the surface (high points on the wafer). This results in a contact area that is only a fraction of the wafer size.
The Side Effects of Chemical Mechanical Polishing
Before 1990, the semiconductor industry considered the process of CMP to be impure and not worthy of high-precision fabrication. This assessment correlates with the process's production of particles that contain impurities and the use of impure abrasives. However, with the industry evolving to the use of copper (ICs), the CMP process is now a requirement.
This is due to CMP's ability to remove material in a uniform and planar fashion as well as the ability to stop at the interface between oxide insulating layers and copper. Like with all remedies and solutions, there are side-effects or disadvantages, and CMP is no different. The two more common disadvantages of the CMP process are dishing and corrosion.
Dishing: This refers to an increase in the surface topography of a composite structure, primarily due to the difference in CMP removal rate between the two (or more) materials of the composite. The dishing occurs in the material component with a higher removal rate.
Corrosion: It is challenging to etch copper through dry etching methods, thus requiring damascene processing. In this process, CMP is a critical step. The wet chemical treatment in CMP, however, makes copper corrosion one of the vital issues for copper metallization.
Chemical Mechanical Polishing is a vital part of the PCBA manufacturing process. It is essential to VLSI technology due to its use of multiple components on a single chip. Issues such as short circuits, and various circuit failures, are unavoidable without proper debris removal or planarization. Therefore, the CMP process must be a vital step in the manufacturing process as a whole.
CMP provides the foundation in which PCBs like this are manufactured
With our PCB Design and Analysis overview page, you’ll be sure to have your designers and production teams working together towards implementing the use of CMP in all of your PCB designs. Since the use of chemical mechanical polishing is a critical step in the fabrication process, we encourage your company to view our What's New in Allegro PCB Design page to learn more about CMP and other design processes.
If you’re looking to learn more about how Cadence has the solution for you, talk to us and our team of experts.