There is no doubt that a GPS navigation system is a great tool for long road trips. Its ability to take you exactly where you need to go as well as help you to find services and facilities along the way has made its use essential. Before GPS navigation systems became standard equipment though, you would have to plan out your trip ahead of time using directions from maps or other sources. I remember several times ending up on the wrong highway because I had tried to rely on my memory, and my simple two hour trip turned into a much longer journey.
Planning out your road trip using a map to find the best way to go has a lot of similarities to planning out your printed circuit board routing strategies before you start laying out traces. Just as you would look for the shortest distance on a map while taking into account various factors such as terrain, towns, and road quality, planning your routing also involves a lot of forethought.
You need to plan ahead for how the components will be placed in order to accomplish the type of routing topology that they require. At the same time you also need to plan ahead to make sure that you can properly route escapes out of your fine pitch devices as well as leave yourself enough room to get all the routing in without wandering all over the board. Here’s a closer look at some of these considerations.
Component Placement is the Beginning of Topology Planning and Routing
To have a good and effective plan for routing your trace topologies, you have to start with the component placement. If the components aren’t in the right place, you will never be able to get the topologies to lay out as they should. There are a lot of other considerations for component placement than just routing topologies however.
You need proper clearances between components, to the board edge, and to mechanical features such as device enclosures. You also need to follow the different manufacturing placement rules for assembly and test. Then there are those annoying little keepout zones, sensitive areas of circuitry, and areas of thermal concerns that factor in as well. And lastly, you’ve got to place your parts for their best signal performance.
The best practice is to use the schematic as a reference, or cross-select between your schematic capture and layout tools to choose groups of components that form a signal path. Once grouped together you can then organize those parts in the order laid out in the schematic. Those components can then be moved as a group to fit together with other components on the board, with minor corrections made to finalize their placement. The key is to preserve the signal path as much as possible in your placement for the most optimum trace routing of those nets.
For the best routing on your PCB, you need a good component placement to start with
Escape Routing from High Density Fine Pitch Devices
Before you can start routing your trace topologies, you first need to route your escape patterns from your high density fine pitch parts such as ball grid arrays (BGAs). As technology advancements increase the pin counts on these devices, their pin pitch gets smaller. This makes it increasingly difficult to route traces out of them.
Additionally the more the pin count grows on these parts, the more decoupling capacitors are needed to go along with them. It is important to keep these caps as close as possible to their device pin to reduce inductance, but that will also further congest the available routing channels.
Getting the routing out of the land patterns for these fine pitch parts requires using smaller trace widths. Easily accomplish this by adding specific design rules to your layout, but be sure to check first with your manufacturer. You want to make sure that you aren’t using smaller trace widths then they are able to handle, and the same goes with using smaller vias as well.
For ultra-fine pitch BGAs that use ball pitches with less than 0.5 millimeters, you will need to start looking into using via in pads or microvias in pads. Again, check first with your manufacturer for the optimum via configurations and sizes that will fit with their fabrication and assembly processes.
Another thing that can be extremely useful is that some vendors also publish recommended escape routing examples for their components. Don’t be shy about looking into these resources to help you with your escape routing. Once the escape routing is done, it is time to move on to the main event, routing your traces.
Measured trace routing tuned to perfection
Get the Most Out of Your PCB Design Tools for Routing
Before you start any routing at all on your board, take the time first to fully set up your design rules and constraints. As mentioned above, you can often find settings for specialized routing conditions such as using narrow traces in specific areas like around BGAs. You should also find high speed design rules including topology settings so that you can assign specific topology routing patterns to certain nets. Additionally, you can set up measured trace lengths, matched trace lengths, differential pairs, and unique net class settings for sensitive nets such as clock lines.
As you are routing your board, remember these basic rules:
- Leave yourself room to route data and memory busses. It is very annoying to have to move routing or even replace components to accommodate a large memory bus.
- Make sure to route your signal paths correctly. You went to a lot of trouble to place the components of a signal path in their most optimum configuration, so don’t mess it up now.
- Adhere to the specific topology rules assigned to your nets. These can include routing the connections point to point, as a daisy chain, or staring the connections out from a central point.
- Watch out for split power or ground planes on layers above or below your routing layer so that you don’t route high speed signals over them. The split will ruin the signal’s return path and create a lot of noise on the board.
To best help you with your topology planning and routing guidelines, make sure to use PCB design tools that can give you the most help in this area. Allegro PCB Designer has a constraint driven design process that can make setting up design rules or constraints, and routing topologies fast, effective, and painless.
If you’re looking to learn more about how Cadence has the solution for you, talk to us and our team of experts.
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