If you like jigsaw puzzles, you might do well at placing components on a printed circuit board. It’s going to take more than that though. In most cases, the connector(s) will be part of the placement that is controlled by the outline drawing. Other locked down items can include antennas, shields, heatsinks and various sensors.
Those are the freebies but you have to work around them once they are established. Note that if any of those “given” items are problematic, then you have to take that issue up with the author of the outline drawing. On the other hand, if you are the one placing connectors, bear in mind that we need access to the mating connector and room for the wiring. It becomes more of a three-dimensional puzzle.
Figure 1. Image Credit: Author - Most placement is done by robots these days but small runs can be hand placed.
You have to be able to imagine the pain points for routing but also for assembly, test and even repair. Do not hesitate to report a no-go situation. Bringing the issue up at the design review is likely to cause unnecessary friction as everything around the board is also locked down. Keep the physical design team in the loop during the initial placement phase.
Placing Integrated Circuits, It’s a Family Affair
From there, a high-level floor plan should be developed based on parts with common voltage supplies while accounting for critical nets and/or buses. If the board has memory devices or any analog circuits, those should be the first parts introduced to the layout. It may be beneficial to actually route the memory or other critical connections before completing the rest of the placement. This gives time to the folks who may have to review or simulate the risky stuff.
As a process, I like to gather a chip’s supporting components into a sub-placement before bringing everything onto the board area. In this way, all of the interconnections between devices are easily understood. Colorizing power pins while using the ratsnest to display controlled impedance lines works best for me.
Decoupling Capacitors: A Critical Aspect Of Power Delivery Networks
Every part has a function and many of those functions depend on a short connection. Bypass capacitors are the first thing that comes to mind when thinking about components that want to be near a specific pin. Power domains should be a high priority when it comes to capacitor placement.
Smaller value caps are typically the most sensitive to placement. If you see picofarads on the schematic, consider those to have first priority on placement around the chips. Make sure to consider both the power and the ground pin. The goal is to have the shortest possible loop from the power pin to the cap plus the ground pin of the cap to a ground pin on the device.
Figure 1. Image Credit: Author - An active target PCB. Sometimes, you get lucky and nearly all of the component placement is predetermined.
Some larger caps and inductors are better suited for location near the connector or wherever the voltage domain comes onto the board. This also applies to ESD suppression diodes. The idea there is to clean up the high voltage spikes from the main power supply before they can get too far into the printed circuit board. Blocking caps on the RF lines are handled similarly to prevent the DC noise from coupling onto the more sensitive circuits downstream.
External Oscillators - Your Basic Noise Factory
Crystal Oscillators make waves on a continuous basis. Toggling from a logical one to zero by swinging the voltage up and down over and over creates a radiation pattern around the device. Longer traces would be akin to a larger antenna for sharing those rapid oscillations. We don’t want that.
The electromagnetic emissions from the oscillator can be detrimental to other signals even though they are not switching at the same rate. The problems with these types of components isn’t necessarily the fundamental frequency of the oscillation but rather a multiple of that frequency. These are known as harmonics and it is typically the odd numbered harmonics that get out of hand.
Now, most integrated circuits come in a ball grid array package. They will also have an option for an external oscillator (XO) and it will likely have the pins for the XO somewhere around the perimeter of the device. That will make the placement and routing pretty easy. The crystal oscillator will go right next to the XO pins.
Internal Clocks Also Require Placement Attention
Not all ball maps are the same however. Chip teams will give the valuable pins on the edges of the device to the most significant pins. On a Power Management Integrated Circuit (PMIC), the V-OUT supplies usually take the majority of the outer rows leaving the various clock nets to the inner area. You might be able to use the far side of the board to locate the crystal though it’s not unusual for that side to have limited headroom.
When you find that the device has the pins for the XO well inside the pin field, then it may be necessary to route the clock net(s) within a guard band. A guard band is a ground trace that has vias staked along the signal path. You may have to play with the fan-out to make a lane wide enough for the signal and the guardband. There may be some ground pins on the device that you can sort of follow to get out to the nearest available edge for crystal placement.
The point is that if the clock lines are long, they should also be shielded by a ground barrier or at least given as much space as can be made. In this way, you are committing to a fan-out and routing scheme that you will have to remember to implement. Keep notes or even better, assign some kind of an attribute to the connection(s) indicating their protected status.
Power Supplies: Another Noise Factory That Is Also Location Dependent.
So, the chips are down, the power tree is planted and the critical nets are routed. Regulators go near their loads, especially when it is a switch mode power supply. The SMPS is like a single gate of a PMIC. The output pin is going to be the noise maker. Getting the inductor right up to the power pin(s) is required perhaps even more so than the capacitor that accompanies the inductor.
If you can follow the app notes from the vendor, then you have something you can defend in a design review. This applies across the board, not just to power supplies. Read up. Look at the reference design. You have to get inside their head in order to get the most out of the devices that are on the board. Isolated ground areas with a single tie back to the chassis ground are not unusual in a power supply. Components that use that isolated ground should be gathered so that the size of the isolated ground is as small as possible.
Wrapping it up…
Forget what I wrote about jigsaw puzzles, component placement is about much more than the shapes of the components. The functions determine the placement priority, spacing and even orientation. Otherwise, we’re just saying that everything is close to everything and that can’t really be true.
While it is true that the IPC specs recommend placing all of the parts in the same orientation, the real world insists that at least some of those parts bend to the will of the connectivity. The RF line wants to go straight. That means that the series element faces one direction and the shunt element is perpendicular. That gives us the classic pi pad. This fact and many others inform a placement that is a piece of art - to the trained eye.