Man are we ever an uptight bunch or what? One set of rules is never enough. The end use along with the means of fabrication will set the tone of the constraint set. The time-to-market and cost factors will influence the daily progress and the limitations. We’re on a four dimensional balance beam where over-design is just as bad as under-design. Slim margins are left for the sweet spot of a printed circuit board design.
Rooting Out the Drama in a Given Layout
Every joke has a punch line and every printed circuit will have its own tribulations. Finding and solving these pain-points takes some measure of patience and determination. There are literally an infinite number of solutions, even if we filter for the plausible iterations. With this much freedom and this much at stake, it’s no wonder that sleepless nights are a thing when the tape-out looms.
Signal Integrity is one of the main requirements of a typical PCB. What qualifies as important will vary. Hardly any respect was given to the I2C bus on the main logic board so I was surprised at how much attention was paid to those same nets on the GPS daughter card. The same with the power. The GPS radio card was naturally placed way out in the boondocks so the dedicated voltage supply was long, skinny and somewhat convoluted in its path to the stacking connector.
I was tempted to tell the RF EE, “If you only knew…” but this little board was their world and it was going to be all it could be including an antenna that’s just listening for trouble. Every function on one of these multi-functional boards has a champion. The engineer doing cameras has no input and little concern for what happens on the audio circuit. Feelings mutual from the sound person. We’re out to find the happy medium or, more likely, the zone where everyone is equally “concerned”.
Risk Aversion is One of the Key Aspects of Our OCD
Keeping a level head is easier when there is a checklist to review. Some or all of these techniques will open up the options in your favor.
- Just-in-case circuits are common on early iterations so that by moving a zero-ohm jumper, a different path can be deployed.
- Additional “no-stuff” component footprints are included along transmission lines for impedance matching.
- Sockets are a designer’s best friend. Well, maybe not best friend but a darn good solution for swapping out a faulty device.
- Connectors fan out on the bottom layer to enable trace cutting.
- Test points serve as solderable pads for jumper wires. Try to get them on exposed traces.
- Second source components may require an interposer to allow a variety of devices to be used in a location.
- Reuse of known good circuits: This takes some finesse, it’s easy to lose something in translation. Adapt. Improvise. Overcome.
- Reading down to the very end of a long list: Good job, you’re on your way.
Figure 1. Image Credit: Bittele Electronics - Line width and air gap figures are on a sliding scale. Preferred and minimum numbers are an indication that the shop will want to steer you towards a more conservative approach. Pretty much all boards break some CAM rules, it’s just a matter of severity.
Circling Back to The Multi-Board System
There is a lot to be said for a modular approach where the main logic card hands off as many functions as is practical. Board-to-board connectors allow the peripheral cards to be swapped in response to what can be built at that time.
Spreading the circuits around on different boards will simplify both emissions testing up front and field service down the road. An upgrade is at least conceivable without a scorched Earth scenario where you’re replacing everything. It may be nice when a lot of things can happen on a single PCB but each level of integration adds a little more risk. Rigid-Flex solutions are best saved for mature projects where the unknowns are out of the way.
The development process leans toward the multi-board system while the final production iteration will consolidate around the winners of the bring-up efforts. The main logic board is often a higher technology than the daughter cards though some daughter cards are based on an exotic material, particularly in the wireless space.
Those cases should be managed so that you’re paying the price where you have to and cutting corners where you can. Maybe the radio and antenna start out using the pricey ceramic dielectric material and the end product only has a chip antenna with the radio integrated on the main logic board. This is just a for-instance, the details will always vary.
Figure 2. Image Credit: Bittele Electronics - Placement clearance is constrained based on a class-to-class relationship. Imagine how many classes there can be in real life. (spoiler -->) A lot, especially as you break out the passives.
When the design incorporates several functions and is driven by several engineers, the most intuitive approach is to focus on the power integrity side of the equation. It will be assumed that we can execute a clean bus of 100 ohm differential pairs and chain up a series of RF elements into a reasonable transmission line. The idea is to apportion the power planes with an eye on the temperature plots.
I remember one board, it was about the size of a piece of writing paper and actually had the 3-hole pattern to fit into a binder. Anyway, I went to connect the 12V_BAT from the connector to the ESD diode and the trace width went to something wider than the sheet of paper. The whole screen turned magenta with the trace. Now what? That was a clue that we would be using a few redundant layers and many gratuitous vias for this net.
Getting a good power feed to each part of the SOC and components beyond will help solve for some sins we commit with the high-speed and high frequency lines as they escape from the inner region of the device. Isolation goes into effect as soon as possible but sometimes, we’re forced to finish the work of the chip team by fanning out the traces in a sub-optimal way.
That almost has to be an iterative process. A little exposure of one trace to another is usually ok but there are exceptions. Sometimes, none of the possible fan-out choices look good so we’re trying to achieve the least harmful solution out of the many possibilities. That entails doing as much simulation of both signal lines and power domains as possible.
Figure 3. Image Credit: Author - Is it any wonder that we are fond of rocker switches and headers that give us options “just in case”?
The simulations are as good as the models that built them and only add so much confidence. Things get real when the boards come out in the flesh. At that point, we know the things that we didn’t know.
Again, the trick is to solve those problems without creating any new ones. It will likely happen anyway so that’s why there is usually more than one pre-production run. A lot of details have to fall into place before we get to the glory of a mass production run. Solve every problem between point A and point B and finally get that board done. We’re counting on you.
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