Circuit Maker Software: From Schematic to Simulation

Key Takeaways

• Schematic capture to transfer ideas to the design environment is the first step of using circuit maker software. This is supplemented with early, simpler circuit simulation.

• The board layout builds from the schematic to offer a testable file with DFM emphasis.

• Robust simulation tests the physical features of a board to provide insight into the overall design.

Circuit maker software facilitates the transition from schematic to the physical board

Circuit design at any level invokes a wide swath of different disciplines. From integrated circuits to building out printed circuit boards, there are a wealth of tools that hone in on the particular needs of the designer or design team and allow them to fully realize their board in a minimal amount of time. The vastness of subjects covered can make it difficult to understand the interplay between steps of the design cycle. It is important to realize that backward and forward annotation, usually seen between the schematic and board level, is a microcosm of the overall process. Constructing a PCB is very much a “two steps forward, one step back” work cycle. The further the design proceeds, the more data can be generated from testing and simulations, which then prove to further refine the design.

Much as it is with any job, the best tool to use in a design process depends on the task at hand. Schematic capture and board layout are requisite processes for creating PCBs that not only stand as their own unique sections of design but also influence each other via ongoing revisions and updates to the project. Circuit maker software can support this process, and in this article, we will explore this software and the role it plays in PCB development.

Circuit Maker Software Starts With Schematic Capture

Circuit maker software, particularly schematic capture software, will cover designs from the schematic to board level while producing outputs for further manufacturing processes along the way. This process begins by populating the schematic with symbols and their associated data in the library, if applicable. It may be necessary to create new symbols for parts and pinouts that don’t otherwise adhere to standard designs. Pinouts should follow the naming convention provided by the datasheet for readability while planning later stages of layout design. The final steps are to wire the circuit as determined by the engineering team as well as follow any manufacturer’s guidelines.  

From this point, the engineer can begin simulating the design using a SPICE environment. Similar to the through-hole components and breadboard setup of older days, this allows for rapid and accurate simulation of various waveforms without ever having to deal with probe contacts. Simple cross-probing functionality allows the user to near-instantaneously run and analyze signals. Signal analysis tools also allow for real-time calculations and the visualization of information, such as real and imaginary voltage components of phasors or Bode plots for gain and attenuation. The ability to analyze a circuit simulation at this speed and depth helps streamline the process of review and provides insight to downstream operators as to how best to modulate their work to meet specs on critical nets.

Board Layout Bridges Design Concepts and Manufacturing

The relevant documentation (namely the schematic, but possibly also the bill-of-materials) is passed to the layout designer to begin translating to a finalized board design. Additional layout instructions may include guidance on board dimensions, stack-up requirements, design rules, and other physical board features such as cutouts, chassis/fixture design elements, and other thermal and mechanical features. A necessary feature among all tools is the ability to probe between different levels of the design; here, that typically manifests as cross-probing between the schematic and board level. The ability to quickly isolate a section of the circuit from the larger design allows easy movement of a grouping of circuitry for ease in part placement. The layout designer can be seen as the first line of QA in the sense that they’ll be checking irregularities that may arise from pins/nets or connections that differ from those provided by manufacturers.  Through a valid synthesis between the demands of the manufacturer and engineer, the layout designer can craft a board that will include the relevant features of the land patterns for correct solderability, heat transfer, etc. while meeting internal specifications for the complete circuit.

The ability to visualize and gain feedback (no pun intended) on signals is the premier draw of simulation

Simulation Provides Feedback Before Production

While early circuit simulation relies on information from the manufacturer, like material details and basic circuit connections, both signal and power integrity allows users to analyze the board as it is laid out with its physical features. At this stage of the design, engineers can simulate a handful of the worst-case signals that are intended to be representative of a larger sample. Unfortunately, due to the computational power required to perform analysis, an across-the-board simulation of all signals would not be feasible timewise. This comes with the upshot that analysis can pull from information as granular as the dielectric constant and loss tangent values of particular prepreg materials. Moreover, the thermal properties of the board can be tested using the same degree of sophisticated simulation. In essence, the more powerful a simulation tool is, the less time is spent running simulations, decreasing time spent during testing that may otherwise detract from time-to-market schedules.

Whatever circuit maker software your design calls for, Cadence can support your team with a wide range of PCB Design and Analysis Software for even the most complex and cutting-edge boards. Get started with a free trial of OrCAD PCB Designer to see how the Cadence line of products can provide you with an unparalleled synergy between software services to reduce development time. 

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