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PCB Edge Plating Guidelines to Improve EMC

Key Takeaways

  • PCB edge plating extends normal PCB fabrication abilities, but additional techniques are necessary to support partial depanelization.

  • Edge plating requires tabs to bind routed edges to the panel; the design of these tabs can differ depending on the substrate properties.

  • PCB edge plating can improve EMC and signal integrity performance while aiding thermal routing away from the board.

 View of PCBs in-panel.

PCB edge plating guidelines have to account for edge routing in panels.

Designers and engineers go to great lengths to instill boards with high electromagnetic compatibility (EMC).  Given the proliferation of modern electronics, it’s essential that devices “play nice” with their surroundings, as interruptions to some technology can pose a hazard to users or surroundings. From a financial standpoint, all devices must comply with EMC testing. As individual tests run well into five figures, this is a test where designers should be strongly confident in success before submission.

A standard method for addressing post-production electromagnetic interference (EMI) issues is through enclosures acting as Faraday cages to confine the electromagnetic fields. However, not every design can support this system integration option, like small form factors or wireless network protocols. Suppose designers and test engineers are aware of signal integrity issues early in development. In that case, they can instead incorporate PCB edge plating guidelines, which prevents fields from “leaking out” of the sides of stackups.

Overview of PCB Edge Plating Guidelines

Overview of PCB Edge Plating Guidelines

Design Rules


  • Clearance - keep a .25mm/10 mil gap between copper features around tabs
  • Edge plating needs a 2.5mm/100 mil gap between adjacent edge plating (think slots and cutouts)
  • Thermal performance can improve and stack with other passive thermal routing features
  • Sensitive or demanding signals can have a complete ground reference over the entire board transmission path
  • Confinement of EMI normally emitted out of the board edges

DFM PCB Edge Plating Guidelines

PCB edge plating adds copper to the exposed width side of the board. Since fabricators already have the equipment for milling and plating during normal PCB production, edge plating becomes a relatively straightforward extension of extant processes; for the designer, this mostly means a binary “yes/no” edge plating request on the fabrication artwork and some modifications to design best practices and clearance rules. A significant factor in edge plating success comes down to the surface of the target substrate and how it can stand up to additional milling, especially in the case of multiple-axis milling. Substrate materials without a glass-fiber weave for reinforcement may require additional routing design considerations to ensure the panel is robust enough to withstand later manufacturing processes. 

Edge plating will occur alongside the standard board plating processes, sometimes known as rout plating, to describe the partial or complete depanelization before metallization. Partially routed boards may add tabs to the panel (this is less of a concern in single-edge plating) that act as crude fasteners between the routed edges and the overall panel. Because these tabs are temporary during manufacturing processes, they must balance durability and ease of process removal depending on when depanelization is to occur:

  • Dimensioning - Tabs, at their thickest point between the board and panel, should be approximately 2.5 mm/100 mils. Tabs will be thicker on the substrate for greater adhesion.
  • Clearance - Outer and inner layer artwork around the tabs should be metal-free to prevent exposure during de-tabbing. Aim for a minimum .25mm/10 mil clearance between tabs and copper layer features.
  • Perforation - Tabs can include mouse bites for a less strenuous breakage after assembly or remain solid for post-fabrication removal. 
  • Placement - Tab placement is usually every 50 mm/2 inches along routed edges, but exceptionally thick/thin panels and those using less mechanically stable substrates may require more frequent placement.

For proper adhesion, the edge plating will wrap around the routed edge to the opposite side of the board. This edge plating must extend a minimum of .4 mm/15 mils past the edge with a clearance of .25 mm/10 mil to any different-net copper features and a 2.5mm/100 mil gap to any other plated edges. Typically, edge plating is continuous, but intentional interruptions in the plating are achievable with tabs or routing removal of plating. Finally, the plating should assign to a net – typically ground – for connectivity purposes with any external pours or same-net plane layers.

Motivation and Benefits of PCB Edge Plating

PCB edge plating benefits boards with signal integrity. In general, the edge of boards serves as a discontinuity between interfacing cables, plugs, and any of the copper features of the board. Demanding system requirements like low-voltage differential signaling (LVDS) and high-speed boards need a continuous ground reference over their entire transmission length, and even minor disturbances can result in considerable performance degradation. Edge connectors use edge plating to provide a homogenous electromagnetic background while distributing signals between the top and bottom sides of the board, ensuring a direct ground reference to enhance coherence by minimizing noise.

EMC capability alone can be a driver for edge plating. With increasing speeds, signals at the edges of the boards can propagate over greater distances; especially for power planes that span an entire layer and extend close to the board edge, a significant amount of radiation emits out of the board edges. Without edge plating, the solution is to retract the power plane relative so that its propagating waves cannot easily escape. However, this can restrict power distribution networks and starve current if the planes lack copper areas. Instead, wrap-around edge plating envelops the power planes on the side, blocking emission out of the side of the board. It’s important to note that this confined energy reflects onto the ground layer, and an unsatisfactory layout can increase voltage noise for the system.

Thermal performance can also improve with edge plating. A large surface area of conductive copper tied to a ground plane provides ample heat flux capabilities for high-power boards. Boards can realize noteworthy gains in thermal routing by combining edge plating and additional dissipative features like heat sinks and casings.

Cadence Is on the Cutting-Edge of ECAD Solutions

For many reasons, PCB edge plating guidelines can improve performance; the layout will want to account for the proper design rules to prevent electrical shorting or environmental exposure of internal copper. Constraint-driven design and manufacturer consultation will prevent costly issues during fabrication that can delay production schedules. Ensuring a DFM-ready design can be challenging, but Cadence’s PCB Design and Analysis Software suite gives electronic development teams intermeshing tools to make the process more seamless. With the Constraint Manager in OrCAD PCB Designer, it’s quick and easy to specify even the most complex design constraints and keep layout teams focused on placement and routing instead of navigating best practice rules.

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