Allegro PCB Designer RAKs

Allegro Constraint Compiler: Workshop Learn more at Cadence Support Portal - https://support.cadence.com © 2019 Cadence Design Systems, Inc. All rights reserved w orldw ide. Page 8 Table and Specification Format Overview The Object and Specification tables contain agnostic constraint information for common design circuity and the Mapping table associate the agnostic constraints to design- specific objects. The data is read by the compiler and is combined to fully define the constraint requirements for specific circuitry. (The currently supported file format is .CSV comma-delimited, while in future, it will be .XML.) Mapping Name table (Name,

) o Maps the variables used in other data tables to design-specific names Global Mapping table (Name,Global) o Common mapping across all data tables o Table entries could be made in ./compiler/ACC_DIRECTIVES.CSV Object table (Object,) o Define object groups, reference Rule Sets, and individual object constraints Rule Specification table (Rule,) o Define Electrical Rule Sets, Physical / Spacing Rule Sets by Layer Type, Generic Layer Type or specific Stack-up Object Rule Specification table (ObjectRule,) o Define constraint-related objects and reference Rule Sets o From-To specific constraint assignment for Electrical Rule creation o Define Class-to-Class relationships and assign Spacing Rule Sets

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